2 # This file is part of the coreboot project.
5 # SPDX
-License
-Identifier
: GPL
-2.0-only
7 chip northbridge
/amd
/agesa
/family15tn
/root_complex
9 device cpu_cluster
0 on
10 chip cpu
/amd
/agesa
/family15tn
11 device lapic
10 on
end
16 subsystemid
0x1022 0x1410 inherit
17 chip northbridge
/amd
/agesa
/family15tn
18 device pci
0.0 on
end # Root Complex
19 device pci
1.0 on
end # Internal Graphics P2P bridge
0x99XX
20 device pci
1.1 on
end # Internal Multimedia
21 device pci
2.0 on
end # PCIE SLOT0 x16
22 device pci
3.0 off
end
23 device pci
4.0 on
end # PCIE MINI0
24 device pci
5.0 on
end # PCIE MINI1
25 device pci
6.0 on
end # PCIE Slot1 x1
26 device pci
7.0 on
end # LAN
27 device pci
8.0 off
end # NB
/SB Link P2P bridge
28 end #chip northbridge
/amd
/agesa
/family15tn
30 chip southbridge
/amd
/agesa
/hudson
31 device pci
10.0 on
end # XHCI HC0
32 device pci
10.1 on
end # XHCI HC1
33 device pci
11.0 on
end # SATA
34 device pci
12.0 on
end # USB
35 device pci
12.2 on
end # USB
36 device pci
13.0 on
end # USB
37 device pci
13.2 on
end # USB
38 device pci
14.0 on
end # SMBUS
39 device pci
14.1 on
end # IDE
0x439c
40 device pci
14.2 on
end # HDA
0x4383
41 device pci
14.3 on
end # LPC
0x439d
42 device pci
14.4 on
end # PCI
0x4384 # PCI
-b conflict with GPIO.
43 device pci
14.5 on
end # USB
2
44 device pci
14.6 off
end # Gec
45 device pci
14.7 on
end # SD
46 device pci
15.0 off
end # PCIe
0
47 device pci
15.1 off
end # PCIe
1
48 device pci
15.2 off
end # PCIe
2
49 device pci
15.3 off
end # PCIe
3
50 end #chip southbridge
/amd
/agesa
/hudson
52 chip northbridge
/amd
/agesa
/family15tn
53 device pci
18.0 on
end
54 device pci
18.1 on
end
55 device pci
18.2 on
end
56 device pci
18.3 on
end
57 device pci
18.4 on
end
58 device pci
18.5 on
end
60 register
"spdAddrLookup" = "
62 { {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
63 { {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
68 end #chip northbridge
/amd
/agesa
/family15tn
/root_complex
