src/: Replace GPL boilerplate with SPDX headers
[coreboot.git] / src / mainboard / amd / olivehill / devicetree.cb
blobb620f2bb39d371da4b38132f5f9968dc9ce2b3d9
2 # This file is part of the coreboot project.
5 # SPDX-License-Identifier: GPL-2.0-only
7 chip northbridge/amd/agesa/family16kb/root_complex
8 device cpu_cluster 0 on
9 chip cpu/amd/agesa/family16kb
10 device lapic 0 on end
11 end
12 end
14 device domain 0 on
15 subsystemid 0x1022 0x1410 inherit
16 chip northbridge/amd/agesa/family16kb
17 device pci 0.0 on end # Root Complex
18 device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
19 device pci 1.1 on end # Internal Multimedia
20 device pci 2.0 on end # PCIe Host Bridge
21 device pci 2.1 on end # x4 PCIe slot
22 device pci 2.2 on end # mPCIe slot
23 device pci 2.3 on end # Realtek NIC
24 device pci 2.4 on end # Edge Connector
25 device pci 2.5 on end # Edge Connector
26 end #chip northbridge/amd/agesa/family16kb
28 chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
29 device pci 10.0 on end # XHCI HC0
30 device pci 11.0 on end # SATA
31 device pci 12.0 on end # USB
32 device pci 12.2 on end # USB
33 device pci 13.0 on end # USB
34 device pci 13.2 on end # USB
35 device pci 14.0 on end # SM
36 device pci 14.2 on end # HDA 0x4383
37 device pci 14.3 on end # LPC 0x439d
38 device pci 14.7 on end # SD
39 end #chip southbridge/amd/agesa/hudson
41 chip northbridge/amd/agesa/family16kb
42 device pci 18.0 on end
43 device pci 18.1 on end
44 device pci 18.2 on end
45 device pci 18.3 on end
46 device pci 18.4 on end
47 device pci 18.5 on end
48 register "spdAddrLookup" = "
50 { {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
51 { {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
53 end
55 end #domain
56 end #northbridge/amd/agesa/family16kb/root_complex