src/: Replace GPL boilerplate with SPDX headers
[coreboot.git] / src / mainboard / amd / inagua / devicetree.cb
blob8fb6b2f98cdaf2810a65cf3c723486856c3e5798
2 # This file is part of the coreboot project.
5 # SPDX-License-Identifier: GPL-2.0-only
7 chip northbridge/amd/agesa/family14/root_complex
8 device cpu_cluster 0 on
9 chip cpu/amd/agesa/family14
10 device lapic 0 on end
11 end
12 end
13 device domain 0 on
14 subsystemid 0x1022 0x1510 inherit
15 chip northbridge/amd/agesa/family14
16 device pci 0.0 on end # Root Complex
17 device pci 1.0 on end # Internal Graphics P2P bridge, 9802 to 9806
18 device pci 1.1 on end # Internal HDMI Audio
19 device pci 4.0 on end # PCIE P2P bridge MXM lane 0
20 device pci 5.0 off end # PCIE P2P bridge MXM lane 1
21 device pci 6.0 on end # PCIE P2P bridge LAN
22 device pci 7.0 on end # PCIE P2P bridge MINIPCIE SLOT1
23 device pci 8.0 off end # NB/SB Link P2P bridge
24 end # agesa northbridge
26 chip southbridge/amd/cimx/sb800
27 device pci 11.0 on end # SATA
28 device pci 12.0 on end # OHCI USB 0-4
29 device pci 12.2 on end # EHCI USB 0-4
30 device pci 13.0 on end # OHCI USB 5-9
31 device pci 13.2 on end # EHCI USB 5-9
32 device pci 14.0 on end # SM
33 device pci 14.1 on end # IDE 0x439c
34 device pci 14.2 on end # HDA 0x4383
35 device pci 14.3 on # LPC 0x439d
36 chip superio/smsc/kbc1100
37 device pnp 2e.7 on # Keyboard
38 io 0x60 = 0x60
39 io 0x62 = 0x64
40 irq 0x70 = 1
41 irq 0x72 = 12
42 end
43 end # kbc1100
44 end #LPC
45 device pci 14.4 off end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0}
46 device pci 14.5 on end # OHCI FS/LS USB
47 device pci 14.6 on end # Hudson-E1 GbE MAC: Broadcom BCM5785 (14E4:1699)
48 device pci 15.0 on end # PCIe PortA Express Card
49 device pci 15.1 on end # PCIe PortB NEC USB3.0
50 device pci 15.2 on end # PCIe PortC MINIPCIE SLOT2
51 device pci 15.3 on end # PCIe PortD PCIE X1 SLOT
52 device pci 16.0 on end # OHCI USB 10-13
53 device pci 16.2 on end # EHCI USB 10-13
54 register "gpp_configuration" = "4" #1:1:1:1
55 register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
56 end #southbridge/amd/cimx/sb800
58 chip northbridge/amd/agesa/family14
60 # These seem unnecessary
61 device pci 18.0 on end
62 device pci 18.1 on end
63 device pci 18.2 on end
64 device pci 18.3 on end
65 device pci 18.4 on end
66 device pci 18.5 on end
67 device pci 18.6 on end
68 device pci 18.7 on end
70 register "spdAddrLookup" = "
72 { {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
75 end # agesa northbridge
77 end #domain
78 end #northbridge/amd/agesa/family14/root_complex