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soc/intel/tigerlake: Add FSP header and Fsp.fd file path for Jasper Lake
[coreboot.git] / .gitreview
blob20191c7298b6320ab3d1b5362557ebdcb7417c76
1 [gerrit]
2 host=review.coreboot.org
3 port=29418
4 project=coreboot
5 defaultbranch=master
ast, secure and flexible OpenSource firmware