2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 Kyösti Mälkki <kyosti.malkki@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 /* Interrupt routing for PCI 03:xx.x */
21 Name (_ADR, 0x001c0000)
27 Name (_ADR, 0x001d0000)
28 Name (_PRT, Package() {
29 Package() { 0x0002ffff, 0, 0, 24 }, /* PCI-X slot 1 */
30 Package() { 0x0002ffff, 1, 0, 25 },
31 Package() { 0x0002ffff, 2, 0, 26 },
32 Package() { 0x0002ffff, 3, 0, 27 },
33 Package() { 0x0003ffff, 0, 0, 28 }, /* PCI-X slot 2 */
34 Package() { 0x0003ffff, 1, 0, 29 },
35 Package() { 0x0003ffff, 2, 0, 30 },
36 Package() { 0x0003ffff, 3, 0, 31 },
37 Package() { 0x0004ffff, 0, 0, 32 }, /* On-board GbE */
40 Name (_PRW, Package () { 0x0B, 0x05 }) /* PME# _STS */
41 OperationRegion (PBPC, PCI_Config, 0x00, 0xFF)
42 Field (PBPC, ByteAcc, NoLock, Preserve)
44 Offset (0x3E), BCRL, 8, BCRH, 8
50 Name (_ADR, 0x00040000)
51 Name (_PRW, Package () { 0x0B, 0x05 }) /* PME# _STS */
56 /* Interrupt routing for PCI 04:xx.x */
61 Name (_ADR, 0x001e0000)
67 Name (_ADR, 0x001f0000)
68 Name (_PRT, Package() {
69 Package() { 0x0002ffff, 0, 0, 48 }, /* PCI-X slot 3 */
70 Package() { 0x0002ffff, 1, 0, 49 },
71 Package() { 0x0002ffff, 2, 0, 50 },
72 Package() { 0x0002ffff, 3, 0, 51 },
73 Package() { 0x0003ffff, 0, 0, 52 }, /* PCI-X slot 4 */
74 Package() { 0x0003ffff, 1, 0, 53 },
75 Package() { 0x0003ffff, 2, 0, 54 },
76 Package() { 0x0003ffff, 3, 0, 55 },
77 Package() { 0x0004ffff, 0, 0, 54 }, /* On-board SCSI, GSI not 56 ? */
78 Package() { 0x0004ffff, 1, 0, 55 }, /* On-board SCSI, GSI not 57 */
81 Name (_PRW, Package () { 0x0B, 0x05 }) /* PME# _STS */
82 OperationRegion (PBPC, PCI_Config, 0x00, 0xFF)
83 Field (PBPC, ByteAcc, NoLock, Preserve)
85 Offset (0x3E), BCRL, 8, BCRH, 8
88 #include "acpi/scsi.asl"