soc/intel/skylake: Use PCR write to disable HECI1
[coreboot.git] / configs / config.intel_galileo_gen2.sd
blobc264432dbe50f5b728233609f69a4ddcc3bd68e8
1 CONFIG_COLLECT_TIMESTAMPS=y
2 CONFIG_VENDOR_INTEL=y
3 CONFIG_BOARD_INTEL_GALILEO=y
4 # CONFIG_FSP_DEBUG_ALL is not set
5 CONFIG_BOOTBLOCK_NORMAL=y
6 CONFIG_ON_DEVICE_ROM_LOAD=y
7 # CONFIG_DRIVERS_INTEL_WIFI is not set
8 CONFIG_COMMONLIB_STORAGE_MMC=y
9 CONFIG_STORAGE_ERASE=y
10 CONFIG_STORAGE_EARLY_ERASE=y
11 CONFIG_STORAGE_WRITE=y
12 CONFIG_STORAGE_EARLY_WRITE=y
13 CONFIG_SD_MMC_DEBUG=y
14 CONFIG_SD_MMC_TRACE=y
15 CONFIG_SDHC_TRACE=y
16 CONFIG_BOOTBLOCK_CONSOLE=y
17 CONFIG_POSTCAR_CONSOLE=y
18 CONFIG_CONSOLE_SERIAL_921600=y