superiotool/ite: add IT8625E EC registers
[coreboot.git] / util / inteltool / inteltool.h
blob3c68b6671d05b8f4de86b0162384dbe03c99b24a
1 /* inteltool - dump all registers on an Intel CPU + chipset based system */
2 /* SPDX-License-Identifier: GPL-2.0-only */
4 #ifndef INTELTOOL_H
5 #define INTELTOOL_H 1
7 #include <arch/mmio.h>
8 #include <commonlib/helpers.h>
10 #include <stdint.h>
12 #if defined(__GLIBC__)
13 #include <sys/io.h>
14 #endif
15 #if (defined(__MACH__) && defined(__APPLE__))
16 /* DirectHW is available here: https://www.coreboot.org/DirectHW */
17 #define __DARWIN__
18 #include <DirectHW/DirectHW.h>
19 #endif
20 #ifdef __NetBSD__
21 #include <pciutils/pci.h>
22 #else
23 #include <pci/pci.h>
24 #endif
26 /* This #include is needed for freebsd_{rd,wr}msr. */
27 #if defined(__FreeBSD__)
28 #include <machine/cpufunc.h>
29 #endif
31 #ifdef __NetBSD__
32 static inline uint8_t inb(unsigned port)
34 uint8_t data;
35 __asm volatile("inb %w1,%0" : "=a" (data) : "d" (port));
36 return data;
38 static inline uint16_t inw(unsigned port)
40 uint16_t data;
41 __asm volatile("inw %w1,%0": "=a" (data) : "d" (port));
42 return data;
44 static inline uint32_t inl(unsigned port)
46 uint32_t data;
47 __asm volatile("inl %w1,%0": "=a" (data) : "d" (port));
48 return data;
50 #endif
52 #define INTELTOOL_VERSION "1.0"
54 /* Tested chipsets: */
55 #define PCI_VENDOR_ID_INTEL 0x8086
56 #define PCI_DEVICE_ID_INTEL_ICH 0x2410
57 #define PCI_DEVICE_ID_INTEL_ICH0 0x2420
58 #define PCI_DEVICE_ID_INTEL_ICH2 0x2440
59 #define PCI_DEVICE_ID_INTEL_ICH4 0x24c0
60 #define PCI_DEVICE_ID_INTEL_ICH4M 0x24cc
61 #define PCI_DEVICE_ID_INTEL_ICH5 0x24d0
62 #define PCI_DEVICE_ID_INTEL_ICH6 0x2640
63 #define PCI_DEVICE_ID_INTEL_ICH7DH 0x27b0
64 #define PCI_DEVICE_ID_INTEL_ICH7 0x27b8
65 #define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9
66 #define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd
67 #define PCI_DEVICE_ID_INTEL_NM10 0x27bc
68 #define PCI_DEVICE_ID_INTEL_ICH8 0x2810
69 #define PCI_DEVICE_ID_INTEL_ICH8M 0x2815
70 #define PCI_DEVICE_ID_INTEL_ICH8ME 0x2811
71 #define PCI_DEVICE_ID_INTEL_ICH9DH 0x2912
72 #define PCI_DEVICE_ID_INTEL_ICH9DO 0x2914
73 #define PCI_DEVICE_ID_INTEL_ICH9R 0x2916
74 #define PCI_DEVICE_ID_INTEL_ICH9 0x2918
75 #define PCI_DEVICE_ID_INTEL_ICH9M 0x2919
76 #define PCI_DEVICE_ID_INTEL_ICH9ME 0x2917
77 #define PCI_DEVICE_ID_INTEL_ICH10DO 0x3a14
78 #define PCI_DEVICE_ID_INTEL_ICH10R 0x3a16
79 #define PCI_DEVICE_ID_INTEL_ICH10 0x3a18
80 #define PCI_DEVICE_ID_INTEL_ICH10D 0x3a1a
81 #define PCI_DEVICE_ID_INTEL_3400_DESKTOP 0x3b00
82 #define PCI_DEVICE_ID_INTEL_3400_MOBILE 0x3b01
83 #define PCI_DEVICE_ID_INTEL_P55 0x3b02
84 #define PCI_DEVICE_ID_INTEL_PM55 0x3b03
85 #define PCI_DEVICE_ID_INTEL_H55 0x3b06
86 #define PCI_DEVICE_ID_INTEL_QM57 0x3b07
87 #define PCI_DEVICE_ID_INTEL_H57 0x3b08
88 #define PCI_DEVICE_ID_INTEL_HM55 0x3b09
89 #define PCI_DEVICE_ID_INTEL_Q57 0x3b0a
90 #define PCI_DEVICE_ID_INTEL_HM57 0x3b0b
91 #define PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF 0x3b0d
92 #define PCI_DEVICE_ID_INTEL_B55_A 0x3b0e
93 #define PCI_DEVICE_ID_INTEL_QS57 0x3b0f
94 #define PCI_DEVICE_ID_INTEL_3400 0x3b12
95 #define PCI_DEVICE_ID_INTEL_3420 0x3b14
96 #define PCI_DEVICE_ID_INTEL_3450 0x3b16
97 #define PCI_DEVICE_ID_INTEL_B55_B 0x3b1e
98 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC 0x8119
99 #define PCI_DEVICE_ID_INTEL_ICELAKE_LP_U 0x3482
100 #define PCI_DEVICE_ID_INTEL_Z68 0x1c44
101 #define PCI_DEVICE_ID_INTEL_P67 0x1c46
102 #define PCI_DEVICE_ID_INTEL_UM67 0x1c47
103 #define PCI_DEVICE_ID_INTEL_HM65 0x1c49
104 #define PCI_DEVICE_ID_INTEL_H67 0x1c4a
105 #define PCI_DEVICE_ID_INTEL_HM67 0x1c4b
106 #define PCI_DEVICE_ID_INTEL_Q65 0x1c4c
107 #define PCI_DEVICE_ID_INTEL_QS67 0x1c4d
108 #define PCI_DEVICE_ID_INTEL_Q67 0x1c4e
109 #define PCI_DEVICE_ID_INTEL_QM67 0x1c4f
110 #define PCI_DEVICE_ID_INTEL_B65 0x1c50
111 #define PCI_DEVICE_ID_INTEL_C202 0x1c52
112 #define PCI_DEVICE_ID_INTEL_C204 0x1c54
113 #define PCI_DEVICE_ID_INTEL_C206 0x1c56
114 #define PCI_DEVICE_ID_INTEL_H61 0x1c5c
115 #define PCI_DEVICE_ID_INTEL_Z77 0x1e44
116 #define PCI_DEVICE_ID_INTEL_Z75 0x1e46
117 #define PCI_DEVICE_ID_INTEL_Q77 0x1e47
118 #define PCI_DEVICE_ID_INTEL_Q75 0x1e48
119 #define PCI_DEVICE_ID_INTEL_B75 0x1e49
120 #define PCI_DEVICE_ID_INTEL_H77 0x1e4a
121 #define PCI_DEVICE_ID_INTEL_C216 0x1e53
122 #define PCI_DEVICE_ID_INTEL_QM77 0x1e55
123 #define PCI_DEVICE_ID_INTEL_QS77 0x1e56
124 #define PCI_DEVICE_ID_INTEL_HM77 0x1e57
125 #define PCI_DEVICE_ID_INTEL_UM77 0x1e58
126 #define PCI_DEVICE_ID_INTEL_HM76 0x1e59
127 #define PCI_DEVICE_ID_INTEL_HM75 0x1e5d
128 #define PCI_DEVICE_ID_INTEL_HM70 0x1e5e
129 #define PCI_DEVICE_ID_INTEL_NM70 0x1e5f
130 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL 0x9c41
131 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM 0x9c43
132 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE 0x9c45
133 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_PREM 0x9cc3
134 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP 0x9cc5
135 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_SATA 0xa102
136 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_P2SB 0xa120
137 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_PRE 0xa141
138 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SATA 0x9d03
139 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE 0x9d41
140 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_SKL 0x9d43
141 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_SKL 0x9d46
142 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_SKL 0x9d48
143 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_KBL 0x9d53
144 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_KBL 0x9d56
145 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_KBL 0x9d58
146 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE 0x9d50
147 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM 0x9d4e
148 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM 0x9d4b
149 #define PCI_DEVICE_ID_INTEL_CANNONPOINT_LP_U_PREM 0x9d84
150 #define PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_PREM 0x0284
151 #define PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_BASE 0x0285
152 #define PCI_DEVICE_ID_INTEL_TIGERPOINT_U_SUPER 0xa081
153 #define PCI_DEVICE_ID_INTEL_TIGERPOINT_U_PREM 0xa082
154 #define PCI_DEVICE_ID_INTEL_TIGERPOINT_U_BASE 0xa083
155 #define PCI_DEVICE_ID_INTEL_TIGERPOINT_Y_SUPER 0xa086
156 #define PCI_DEVICE_ID_INTEL_TIGERPOINT_Y_PREM 0xa087
157 #define PCI_DEVICE_ID_INTEL_H110 0xa143
158 #define PCI_DEVICE_ID_INTEL_H170 0xa144
159 #define PCI_DEVICE_ID_INTEL_Z170 0xa145
160 #define PCI_DEVICE_ID_INTEL_Q170 0xa146
161 #define PCI_DEVICE_ID_INTEL_Q150 0xa147
162 #define PCI_DEVICE_ID_INTEL_B150 0xa148
163 #define PCI_DEVICE_ID_INTEL_C236 0xa149
164 #define PCI_DEVICE_ID_INTEL_C232 0xa14a
165 #define PCI_DEVICE_ID_INTEL_QM170 0xa14d
166 #define PCI_DEVICE_ID_INTEL_HM170 0xa14e
167 #define PCI_DEVICE_ID_INTEL_CM236 0xa150
168 #define PCI_DEVICE_ID_INTEL_HM175 0xa152
169 #define PCI_DEVICE_ID_INTEL_QM175 0xa153
170 #define PCI_DEVICE_ID_INTEL_CM238 0xa154
172 #define PCI_DEVICE_ID_INTEL_C621 0xa1c1
173 #define PCI_DEVICE_ID_INTEL_C622 0xa1c2
174 #define PCI_DEVICE_ID_INTEL_C624 0xa1c3
175 #define PCI_DEVICE_ID_INTEL_C625 0xa1c4
176 #define PCI_DEVICE_ID_INTEL_C626 0xa1c5
177 #define PCI_DEVICE_ID_INTEL_C627 0xa1c6
178 #define PCI_DEVICE_ID_INTEL_C628 0xa1c7
179 #define PCI_DEVICE_ID_INTEL_C629 0xa1ca
180 #define PCI_DEVICE_ID_INTEL_C621A 0xa1cb
181 #define PCI_DEVICE_ID_INTEL_C627A 0xa1cc
182 #define PCI_DEVICE_ID_INTEL_C629A 0xa1cd
183 #define PCI_DEVICE_ID_INTEL_C624_SUPER 0xa242
184 #define PCI_DEVICE_ID_INTEL_C627_SUPER_1 0xa243
185 #define PCI_DEVICE_ID_INTEL_C621_SUPER 0xa244
186 #define PCI_DEVICE_ID_INTEL_C627_SUPER_2 0xa245
187 #define PCI_DEVICE_ID_INTEL_C628_SUPER 0xa246
188 #define PCI_DEVICE_ID_INTEL_C621A_SUPER 0xa24a
189 #define PCI_DEVICE_ID_INTEL_C627A_SUPER 0xa24b
190 #define PCI_DEVICE_ID_INTEL_C629A_SUPER 0xa24c
192 #define PCI_DEVICE_ID_INTEL_EBG 0x1b81
194 #define PCI_DEVICE_ID_INTEL_H270 0xa2c4
195 #define PCI_DEVICE_ID_INTEL_Z270 0xa2c5
196 #define PCI_DEVICE_ID_INTEL_Q270 0xa2c6
197 #define PCI_DEVICE_ID_INTEL_Q250 0xa2c7
198 #define PCI_DEVICE_ID_INTEL_B250 0xa2c8
199 #define PCI_DEVICE_ID_INTEL_Z370 0xa2c9
200 #define PCI_DEVICE_ID_INTEL_H310C 0xa2ca
201 #define PCI_DEVICE_ID_INTEL_X299 0xa2d2
203 #define PCI_DEVICE_ID_INTEL_H310 0xa303
204 #define PCI_DEVICE_ID_INTEL_H370 0xa304
205 #define PCI_DEVICE_ID_INTEL_Z390 0xa305
206 #define PCI_DEVICE_ID_INTEL_Q370 0xa306
207 #define PCI_DEVICE_ID_INTEL_B360 0xa308
208 #define PCI_DEVICE_ID_INTEL_C246 0xa309
209 #define PCI_DEVICE_ID_INTEL_C242 0xa30a
210 #define PCI_DEVICE_ID_INTEL_QM370 0xa30c
211 #define PCI_DEVICE_ID_INTEL_HM370 0xa30d
212 #define PCI_DEVICE_ID_INTEL_CM246 0xa30e
214 #define PCI_DEVICE_ID_INTEL_Q570 0x4384
215 #define PCI_DEVICE_ID_INTEL_Z590 0x4385
216 #define PCI_DEVICE_ID_INTEL_H570 0x4386
217 #define PCI_DEVICE_ID_INTEL_B560 0x4387
218 #define PCI_DEVICE_ID_INTEL_H510 0x4388
219 #define PCI_DEVICE_ID_INTEL_WM590 0x4389
220 #define PCI_DEVICE_ID_INTEL_QM580 0x438a
221 #define PCI_DEVICE_ID_INTEL_HM570 0x438b
222 #define PCI_DEVICE_ID_INTEL_C252 0x438c
223 #define PCI_DEVICE_ID_INTEL_C256 0x438d
224 #define PCI_DEVICE_ID_INTEL_W580 0x438f
226 #define PCI_DEVICE_ID_INTEL_82810 0x7120
227 #define PCI_DEVICE_ID_INTEL_82810_DC 0x7122
228 #define PCI_DEVICE_ID_INTEL_82810E_DC 0x7124
229 #define PCI_DEVICE_ID_INTEL_82830M 0x3575
230 #define PCI_DEVICE_ID_INTEL_82845 0x1a30
231 #define PCI_DEVICE_ID_INTEL_82865 0x2570
232 #define PCI_DEVICE_ID_INTEL_82915 0x2580
233 #define PCI_DEVICE_ID_INTEL_82945P 0x2770
234 #define PCI_DEVICE_ID_INTEL_82945GM 0x27a0
235 #define PCI_DEVICE_ID_INTEL_82945GSE 0x27ac
236 #define PCI_DEVICE_ID_INTEL_82946 0x2970
237 #define PCI_DEVICE_ID_INTEL_82965PM 0x2a00
238 #define PCI_DEVICE_ID_INTEL_82Q965 0x2990
239 #define PCI_DEVICE_ID_INTEL_82975X 0x277c
240 #define PCI_DEVICE_ID_INTEL_82Q35 0x29b0
241 #define PCI_DEVICE_ID_INTEL_82G33 0x29c0
242 #define PCI_DEVICE_ID_INTEL_82Q33 0x29d0
243 #define PCI_DEVICE_ID_INTEL_82X38 0x29e0
244 #define PCI_DEVICE_ID_INTEL_32X0 0x29f0
245 #define PCI_DEVICE_ID_INTEL_82XX4X 0x2a40
246 #define PCI_DEVICE_ID_INTEL_82Q45 0x2e10
247 #define PCI_DEVICE_ID_INTEL_82G45 0x2e20
248 #define PCI_DEVICE_ID_INTEL_82G41 0x2e30
249 #define PCI_DEVICE_ID_INTEL_82B43 0x2e40
250 #define PCI_DEVICE_ID_INTEL_82B43_2 0x2e90
252 #define PCI_DEVICE_ID_INTEL_C8_MOBILE 0x8c41
253 #define PCI_DEVICE_ID_INTEL_C8_DESKTOP 0x8c42
254 #define PCI_DEVICE_ID_INTEL_Z87 0x8c44
255 #define PCI_DEVICE_ID_INTEL_Z85 0x8c46
256 #define PCI_DEVICE_ID_INTEL_HM86 0x8c49
257 #define PCI_DEVICE_ID_INTEL_H87 0x8c4a
258 #define PCI_DEVICE_ID_INTEL_HM87 0x8c4b
259 #define PCI_DEVICE_ID_INTEL_Q85 0x8c4c
260 #define PCI_DEVICE_ID_INTEL_Q87 0x8c4e
261 #define PCI_DEVICE_ID_INTEL_QM87 0x8c4f
262 #define PCI_DEVICE_ID_INTEL_B85 0x8c50
263 #define PCI_DEVICE_ID_INTEL_C222 0x8c52
264 #define PCI_DEVICE_ID_INTEL_C224 0x8c54
265 #define PCI_DEVICE_ID_INTEL_C226 0x8c56
266 #define PCI_DEVICE_ID_INTEL_H81 0x8c5c
268 #define PCI_DEVICE_ID_INTEL_82X58 0x3405
269 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO 0x8100
270 #define PCI_DEVICE_ID_INTEL_ATOM_DXXX 0xa000
271 #define PCI_DEVICE_ID_INTEL_I63XX 0x2670
273 #define PCI_DEVICE_ID_INTEL_I5000X 0x25c0
274 #define PCI_DEVICE_ID_INTEL_I5000Z 0x25d0
275 #define PCI_DEVICE_ID_INTEL_I5000V 0x25d4
276 #define PCI_DEVICE_ID_INTEL_I5000P 0x25d8
278 /* untested, but almost identical to D-series */
279 #define PCI_DEVICE_ID_INTEL_ATOM_NXXX 0xa010
281 #define PCI_DEVICE_ID_INTEL_82443LX 0x7180
282 /* 82443BX has a different device ID if AGP is disabled (hardware-wise). */
283 #define PCI_DEVICE_ID_INTEL_82443BX 0x7190
284 #define PCI_DEVICE_ID_INTEL_82443BX_NO_AGP 0x7192
286 /* 82371AB/EB/MB use the same device ID value. */
287 #define PCI_DEVICE_ID_INTEL_82371XX 0x7110
289 /* Bay Trail */
290 #define PCI_DEVICE_ID_INTEL_BAYTRAIL 0x0f00 /* SOC Transaction Router */
291 #define PCI_DEVICE_ID_INTEL_BAYTRAIL_LPC 0x0f1c
292 #define PCI_DEVICE_ID_INTEL_BAYTRAIL_GFX 0x0f31
293 #define CPUID_BAYTRAIL 0x30670
295 #define PCI_DEVICE_ID_INTEL_APL_LPC 0x5ae8
296 #define PCI_DEVICE_ID_INTEL_DNV_LPC 0x19dc
298 /* Intel starts counting these generations with the integration of the DRAM controller */
299 #define PCI_DEVICE_ID_INTEL_CORE_0TH_GEN 0xd132 /* Nehalem */
300 #define PCI_DEVICE_ID_INTEL_CORE_1ST_GEN 0x0044 /* Westmere */
301 #define PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_D 0x0100 /* Sandy Bridge (Desktop) */
302 #define PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_M 0x0104 /* Sandy Bridge (Mobile) */
303 #define PCI_DEVICE_ID_INTEL_CORE_2ND_GEN_E3 0x0108 /* Sandy Bridge (Xeon E3) */
304 #define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_D 0x0150 /* Ivy Bridge (Desktop) */
305 #define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_M 0x0154 /* Ivy Bridge (Mobile) */
306 #define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_E3 0x0158 /* Ivy Bridge (Xeon E3 v2) */
307 #define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_015c 0x015c /* Ivy Bridge (?) */
308 #define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_D 0x0c00 /* Haswell (Desktop) */
309 #define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_M 0x0c04 /* Haswell (Mobile) */
310 #define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_E3 0x0c08 /* Haswell (Xeon E3 v3) */
311 #define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U 0x0a04 /* Haswell-ULT */
312 #define PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U 0x1604 /* Broadwell-ULT */
313 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2 0x190f /* Skylake (Desktop) */
314 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U 0x1904 /* Skylake (Mobile) */
315 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y 0x190c /* Skylake (Mobile) */
316 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M 0x1910 /* Skylake (Mobile) */
317 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST 0x1918 /* Skylake (Workstation) */
318 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D 0x191f /* Skylake (Desktop) */
319 #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_E 0x2020 /* Skylake-E (Server) */
320 #define PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U 0x5904 /* Kabylake (Mobile) */
321 #define PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y 0x590C /* Kabylake (Mobile) */
322 #define PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q 0x5914 /* Kabylake (Mobile) */
323 #define PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3 0x5918 /* Kabylake Xeon E3 */
324 #define PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_1 0x3ed0 /* Coffeelake (Mobile) */
325 #define PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_2 0x3e34 /* Whiskeylake (Mobile) */
326 #define PCI_DEVICE_ID_INTEL_CORE_10TH_GEN_U 0x8a12 /* Icelake U */
327 #define PCI_DEVICE_ID_INTEL_CORE_CML_U1 0x9b51 /* Cometlake U (Mobile) */
328 #define PCI_DEVICE_ID_INTEL_CORE_CML_U2 0x9b61 /* Cometlake U (Mobile) */
329 #define PCI_DEVICE_ID_INTEL_CORE_CML_U3 0x9b71 /* Cometlake U (Mobile) */
330 #define PCI_DEVICE_ID_INTEL_CORE_TGL_ID_U_2 0x9a04 /* Tigerlake UP3 2 Cores */
331 #define PCI_DEVICE_ID_INTEL_CORE_TGL_ID_U_4 0x9a14 /* Tigerlake UP3 4 Cores */
332 #define PCI_DEVICE_ID_INTEL_CORE_TGL_ID_Y_2 0x9a02 /* Tigerlake UP4 2 Cores */
333 #define PCI_DEVICE_ID_INTEL_CORE_TGL_ID_Y_4 0x9a12 /* Tigerlake UP4 4 Cores */
334 #define PCI_DEVICE_ID_INTEL_CORE_TGL_ID_H_4 0x9a16 /* Tigerlake H 4 Cores */
335 #define PCI_DEVICE_ID_INTEL_CORE_TGL_ID_H_6 0x9a26 /* Tigerlake H 6 Cores */
336 #define PCI_DEVICE_ID_INTEL_CORE_TGL_ID_H_8 0x9a36 /* Tigerlake H 8 Cores */
337 #define PCI_DEVICE_ID_INTEL_HEWITTLAKE 0x6f00 /* Hewitt Lake */
338 #define PCI_DEVICE_ID_INTEL_SAPPHIRERAPIDS_SP 0x09a2 /* Sapphire Rapids SP */
341 /* Intel GPUs */
342 #define PCI_DEVICE_ID_INTEL_G35_EXPRESS 0x2982
343 #define PCI_DEVICE_ID_INTEL_G35_EXPRESS_1 0x2983
344 #define PCI_DEVICE_ID_INTEL_965_EXPRESS 0x2a02
345 #define PCI_DEVICE_ID_INTEL_965_EXPRESS_1 0x2a03
346 #define PCI_DEVICE_ID_INTEL_965_EXPRESS_2 0x2a12
347 #define PCI_DEVICE_ID_INTEL_965_EXPRESS_3 0x2a13
348 #define PCI_DEVICE_ID_INTEL_4_SERIES 0x2a42
349 #define PCI_DEVICE_ID_INTEL_4_SERIES_1 0x2a43
350 #define PCI_DEVICE_ID_INTEL_G45 0x2e22
351 #define PCI_DEVICE_ID_INTEL_G45_1 0x2e23
352 #define PCI_DEVICE_ID_INTEL_Q45 0x2e12
353 #define PCI_DEVICE_ID_INTEL_Q45_1 0x2e13
354 #define PCI_DEVICE_ID_INTEL_G41 0x2e32
355 #define PCI_DEVICE_ID_INTEL_G41_1 0x2e33
356 #define PCI_DEVICE_ID_INTEL_B43 0x2e42
357 #define PCI_DEVICE_ID_INTEL_B43_1 0x2e43
358 #define PCI_DEVICE_ID_INTEL_B43_2 0x2e92
359 #define PCI_DEVICE_ID_INTEL_B43_3 0x2e93
360 #define PCI_DEVICE_ID_INTEL_HD_GRAPHICS 0x0046
361 #define PCI_DEVICE_ID_INTEL_HD_GRAPHICS_1 0x0042
362 #define PCI_DEVICE_ID_INTEL_HD_GRAPHICS_2 0x0106
363 #define PCI_DEVICE_ID_INTEL_HD_2000 0x0102
364 #define PCI_DEVICE_ID_INTEL_HD_2000_1 0x0106
365 #define PCI_DEVICE_ID_INTEL_HD_3000 0x0116
366 #define PCI_DEVICE_ID_INTEL_HD_3000_1 0x0112
367 #define PCI_DEVICE_ID_INTEL_HD_3000_2 0x0116
368 #define PCI_DEVICE_ID_INTEL_HD_3000_3 0x0122
369 #define PCI_DEVICE_ID_INTEL_HD_3000_4 0x0126
370 #define PCI_DEVICE_ID_INTEL_HD_3000_5 0x0116
371 #define PCI_DEVICE_ID_INTEL_HD_2500 0x0152
372 #define PCI_DEVICE_ID_INTEL_HD_2500_1 0x0156
373 #define PCI_DEVICE_ID_INTEL_HD_2500_2 0x015A
374 #define PCI_DEVICE_ID_INTEL_HD_4000 0x0162
375 #define PCI_DEVICE_ID_INTEL_HD_4000_1 0x0166
376 #define PCI_DEVICE_ID_INTEL_HD_4000_2 0x016A
377 #define PCI_DEVICE_ID_INTEL_HD_4600 0x0412
378 #define PCI_DEVICE_ID_INTEL_HD_4600_1 0x0416
379 #define PCI_DEVICE_ID_INTEL_HD_4400 0x041E
380 #define PCI_DEVICE_ID_INTEL_HD_5000 0x0422
381 #define PCI_DEVICE_ID_INTEL_HD_5000_1 0x0426
382 #define PCI_DEVICE_ID_INTEL_HD_5000_2 0x042A
383 #define PCI_DEVICE_ID_INTEL_HD_510 0x1902
384 #define PCI_DEVICE_ID_INTEL_HD_515 0x191E
385 #define PCI_DEVICE_ID_INTEL_HD_520 0x1916
386 #define PCI_DEVICE_ID_INTEL_HD_530_1 0x191B
387 #define PCI_DEVICE_ID_INTEL_HD_530_2 0x1912
388 #define PCI_DEVICE_ID_INTEL_UHD_615_1 0x591C
389 #define PCI_DEVICE_ID_INTEL_UHD_615_2 0x591E
390 #define PCI_DEVICE_ID_INTEL_UHD_617 0x87C0
391 #define PCI_DEVICE_ID_INTEL_UHD_620_1 0x5917
392 #define PCI_DEVICE_ID_INTEL_UHD_620_2 0x3EA0
393 #define PCI_DEVICE_ID_INTEL_UHD_620_3 0x5916
394 #define PCI_DEVICE_ID_INTEL_UHD_630_1 0x3E92
395 #define PCI_DEVICE_ID_INTEL_UHD_630_2 0x3E9B
396 #define PCI_DEVICE_ID_INTEL_UHD_630_3 0x3E91
397 #define PCI_DEVICE_ID_INTEL_UHD_630_4 0x5912
398 #define PCI_DEVICE_ID_INTEL_UHD_630_5 0x591B
399 #define PCI_DEVICE_ID_INTEL_UHD_630_6 0x5902
400 #define PCI_DEVICE_ID_INTEL_UHD_630_7 0x3E98
401 #define PCI_DEVICE_ID_INTEL_UHD_640 0x5926
402 #define PCI_DEVICE_ID_INTEL_IRIS_540 0x1926
403 #define PCI_DEVICE_ID_INTEL_IRIS_550 0x1927
404 #define PCI_DEVICE_ID_INTEL_IRIS_PRO_580 0x193B
405 #define PCI_DEVICE_ID_INTEL_IRIS_PLUS_650 0x5927
406 #define PCI_DEVICE_ID_INTEL_IRIS_PLUS_655 0x3EA5
407 #define PCI_DEVICE_ID_INTEL_IRIS_PLUS_G7 0x8A52
408 #define PCI_DEVICE_ID_INTEL_UHD_GRAPHICS 0x9b41
409 #define PCI_DEVICE_ID_INTEL_TGL_GT2_Y 0x9A40
410 #define PCI_DEVICE_ID_INTEL_TGL_GT2_UY 0x9A49
411 #define PCI_DEVICE_ID_INTEL_TGL_GT1 0x9A60
412 #define PCI_DEVICE_ID_INTEL_TGL_GT1_2 0x9A68
413 #define PCI_DEVICE_ID_INTEL_TGL_GT2_ULT_1 0x9A78
414 #define PCI_DEVICE_ID_INTEL_TGL_GT2_ULT_2 0x9A70
416 #if !defined(__DARWIN__) && !defined(__FreeBSD__)
417 typedef struct { uint32_t hi, lo; } msr_t;
418 #endif
419 #if defined (__FreeBSD__)
420 /* FreeBSD already has conflicting definitions for wrmsr/rdmsr. */
421 #undef rdmsr
422 #undef wrmsr
423 #define rdmsr freebsd_rdmsr
424 #define wrmsr freebsd_wrmsr
425 typedef struct { uint32_t hi, lo; } msr_t;
426 #endif
427 typedef struct { uint16_t addr; int size; char *name; } io_register_t;
428 typedef struct {
429 uint32_t eax;
430 uint32_t ebx;
431 uint32_t ecx;
432 uint32_t edx;
433 } cpuid_result_t;
435 void *map_physical(uint64_t phys_addr, size_t len);
436 void unmap_physical(void *virt_addr, size_t len);
438 unsigned int cpuid(unsigned int op);
439 int print_intel_msrs(unsigned int range_start, unsigned int range_end);
440 int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_spd_file);
441 int print_pmbase(struct pci_dev *sb, struct pci_access *pacc);
442 int print_lpc(struct pci_dev *sb, struct pci_access *pacc);
443 int print_rcba(struct pci_dev *sb);
444 void print_iobp(struct pci_dev *sb, volatile uint8_t *rcba);
445 int print_gpios(struct pci_dev *sb, int show_all, int show_diffs);
446 const struct gpio_community *const *get_gpio_communities(struct pci_dev *const sb,
447 size_t* community_count,
448 size_t* pad_stepping);
449 void print_gpio_groups(struct pci_dev *sb);
450 int print_epbar(struct pci_dev *nb);
451 int print_dmibar(struct pci_dev *nb);
452 int print_pciexbar(struct pci_dev *nb);
453 int print_ambs(struct pci_dev *nb, struct pci_access *pacc);
454 int print_spi(struct pci_dev *sb);
455 int print_gfx(struct pci_dev *gfx);
456 int print_ahci(struct pci_dev *ahci);
457 int print_sgx(void);
458 void print_tme(void);
459 void ivybridge_dump_timings(const char *dump_spd_file);
461 #endif