2 * This file is part of the superiotool project.
4 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
5 * Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de>
6 * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
7 * Copyright (C) 2014 Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
24 #include "superiotool.h"
26 #define DEVICE_ID_BYTE1_REG 0x20
27 #define DEVICE_ID_BYTE2_REG 0x21
29 #define VENDOR_ID_BYTE1_REG 0x23
30 #define VENDOR_ID_BYTE2_REG 0x24
32 #define FINTEK_VENDOR_ID 0x3419
34 static const struct superio_registers reg_table
[] = {
35 {0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */
36 /* We assume reserved bits are read as 0. */
38 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
40 {0x06,0x01,0x19,0x34,0x00,0x00,MISC
,0x00,0x00,0x00,
43 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT
},
44 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT
}},
46 {0x30,0x60,0x61,0x70,0xf0,EOT
},
47 {0x01,0x03,0xf8,0x04,0x00,EOT
}},
49 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT
},
50 {0x01,0x02,0xf8,0x03,0x00,0x00,EOT
}},
51 {0x3, "Parallel port",
52 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT
},
53 {0x01,0x03,0x78,0x07,0x03,0x42,EOT
}},
54 {0x4, "Hardware monitor",
55 {0x30,0x60,0x61,0x70,EOT
},
56 {0x01,0x02,0x95,0x00,EOT
}},
58 {0x30,0x60,0x61,0x70,0x72,EOT
},
59 {0x01,0x00,0x60,0x00,0x00,EOT
}},
61 {0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,
62 0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,
64 {0x00,0x0f,NANA
,0x00,0x00,0xff,NANA
,0x00,0x00,0xff,
65 NANA
,0x00,0x00,0x0f,NANA
,0x00,0x00,0x3f,NANA
,0x00,
68 {0x30,0x60,0x61, 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
70 {0x00,0x00,0x00, 0x00,0x00,MISC
,0x00,NANA
,0x00,0x00,
73 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
74 0xfb,0xfc,0xfd,0xfe,0xff,EOT
},
75 {0x10,0x04,0x01,NANA
,0x00,0x00,0x00,NANA
,0x00,0x00,
76 0x00,0x00,0x00,0x00,0x00,EOT
}},
78 {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT
},
79 {0x00,0x00,NANA
,0x06,0x1c,0x01,EOT
}},
81 {0x0710, "F71869A/AD", {
82 /* We assume reserved bits are read as 0. */
84 {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
85 0x29,0x29,0x2a,0x2a,0x2b,0x2b,0x2c,0x2c,0x2d,EOT
},
86 {0x00,0x00,0x10,0x07,0x19,0x34,0x00,0x00,NANA
,0x38,
87 0x6f,0x03,0x0f,0xe7,0x0f,NANA
,0x00,NANA
,0x28,EOT
}},
89 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT
},
90 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT
}},
92 {0x30,0x60,0x61,0x70,0xf0,EOT
},
93 {0x01,0x03,0xf8,0x04,0x00,EOT
}},
95 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT
},
96 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT
}},
97 {0x3, "Parallel port",
98 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT
},
99 {0x01,0x03,0x78,0x07,0x03,0x42,EOT
}},
100 {0x4, "Hardware monitor",
101 {0x30,0x60,0x61,0x70,EOT
},
102 {0x01,0x02,0x95,0x00,EOT
}},
104 {0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT
},
105 {0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT
}},
107 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
108 0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
109 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xa0,
110 0xa1,0xa2,0xa4,0xa5,0xa6,0xa9,0xab,0xac,0xad,0xae,
111 0xaf,0x90,0x91,0x92,0x80,0x81,0x82,0x83,EOT
},
112 {0x00,0x00,0x00,0x00,0x00,0x3f,NANA
,0x00,0x00,0xff,
113 NANA
,0x00,0x00,0x00,0x00,0x00,0xff,NANA
,0x00,0x00,
114 0xff,NANA
,0x00,0x0f,NANA
,0x00,0x00,0x00,0x00,0x00,
115 0x1f,NANA
,0x00,0x00,0x00,0x00,0x00,0xe0,0x00,0x00,
116 0x40,0x00,0xff,NANA
,0x00,0xff,NANA
,0x00,EOT
}},
118 {0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT
},
119 {0x01,0x00,0x00,NANA
,0x00,0x0a,0x00,EOT
}},
121 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb,
123 {0x00,0x00,0x00,0x00,NANA
,NANA
,0x00,0x00,0x80,0x3b,
124 0x00,0x00,0x00,EOT
}},
125 {0xa, "PME, ACPI, and ERP Power Saving",
126 {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
127 0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
128 0xf6,0xf7,0xf8,0xf9,0xfa,0xfc,0xfe,EOT
},
129 {0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
130 0x0f,0x00,0x00,0x00,0x00,NANA
,0x00,NANA
,0x06,0x1c,
131 0x1f,0x86,0x00,0x00,0x00,0x07,0x00,EOT
}},
133 {0x1408, "F71869E/ED", {
134 /* We assume reserved bits are read as 0. */
136 {0x02,0x07,0x20,0x21,0x23,0x24,0x26,0x27,0x28,0x29,
138 {0x00,0x00,0x08,0x14,0x19,0x34,0x00,NANA
,0x38,0x6f,
139 0x07,0x0f,0x28,EOT
}},
141 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT
},
142 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT
}},
144 {0x30,0x60,0x61,0x70,0xf0,EOT
},
145 {0x01,0x03,0xf8,0x04,0x00,EOT
}},
147 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT
},
148 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT
}},
149 {0x03, "Parallel port",
150 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT
},
151 {0x01,0x03,0x78,0x07,0x03,0x42,EOT
}},
152 {0x04, "Hardware Monitor",
153 {0x30,0x60,0x61,0x70,EOT
},
154 {0x01,0x02,0x95,0x00,EOT
}},
156 {0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT
},
157 {0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT
}},
159 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
160 0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
161 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,
162 0x90,0x91,0x92,0x93,EOT
},
163 {0x00,0x00,0x00,0x00,0x00,0x3f,NANA
,0x00,0x00,0xff,
164 NANA
,0x00,0x00,0x00,0x00,0x00,0xff,NANA
,0x00,0x00,
165 0xff,NANA
,0x00,0x0f,NANA
,0x00,0x00,0x1f,NANA
,0x00,
166 0x00,0x3f,NANA
,0x00,EOT
}},
168 {0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT
},
169 {0x01,0x00,0x00,NANA
,0x00,0x0a,0x00,EOT
}},
170 {0x0a, "PME, ACPI, and EUP Power Saving",
171 {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
172 0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
174 {0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
175 0x00,0x00,0x00,0x00,0x00,NANA
,0x06,0x1c,0x1f,0x86,
176 0x00,0x00,0x00,EOT
}},
179 /* We assume reserved bits are read as 0. */
181 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,
183 {0x07,0x23,0x19,0x34,0x00,0x00,0x00,0x00,0xf0,0x30,
186 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT
},
187 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT
}},
189 {0x30,0x60,0x61,0x70,0xf0,EOT
},
190 {0x01,0x03,0xf8,0x04,0x00,EOT
}},
192 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT
},
193 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT
}},
194 {0x3, "Parallel port",
195 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT
},
196 {0x01,0x03,0x78,0x07,0x03,0x42,EOT
}},
197 {0x4, "Hardware monitor",
198 {0x30,0x60,0x61,0x70,EOT
},
199 {0x01,0x02,0x95,0x00,EOT
}},
201 {0x30,0x60,0x61,0x70,0x72,0xfe,EOT
},
202 {0x01,0x00,0x60,0x01,0x0c,0x81,EOT
}},
204 {0x80,0x81,0x82,0x83,0x90,0x91,0x92,0x93,0xa0,0xa1,
205 0xa2,0xa3,0xb0,0xb1,0xb2,0xc0,0xc1,0xc2,0xc3,0xd0,
206 0xd1,0xd2,0xd3,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2,
208 {0x00,0xff,NANA
,0x00,0x00,0xff,NANA
,0x00,0x00,0x1f,
209 NANA
,0x00,0x00,0xff,NANA
,0x00,0xff,NANA
,0x00,0x00,
210 0xff,NANA
,0x00,0x00,0x7f,NANA
,0x00,0x00,0x7f,NANA
,
211 0x00,0x00,0x00,EOT
}},
213 {0x30,0x60,0x61,EOT
},
214 {0x00,0x00,0x00,EOT
}},
216 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
217 0xfb,0xfc,0xfd,0xfe,0xff,EOT
},
218 {0x00,RSVD
,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
219 0x00,0x00,0x00,0x00,0x00,EOT
}},
221 {0x30,0xf0,0xf1,0xf4,0xf5,0xf6,EOT
},
222 {0x00,0x00,0x00,0x26,0x1c,0x07,EOT
}},
224 {0xf0,0xf1,0xf2,0xf3,0xff,EOT
},
225 {0x64,0x64,0x64,0x00,0x00,EOT
}},
227 {0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */
229 {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
230 0x29,0x2a,0x2b,0x2c,0x2d,EOT
},
231 {0x03,0x41,RSVD
,0x19,0x34,0x00,0x00,MISC
,0x66,
232 0x80,0x00,0x00,0x00,0x04,EOT
}},
234 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT
},
235 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT
}},
237 {0x30,0x60,0x61,0x70,0xf0,EOT
},
238 {0x01,0x03,0xf8,0x04,0x00,EOT
}},
240 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT
},
241 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT
}},
242 {0x3, "Parallel port",
243 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT
},
244 {0x01,0x03,0x78,0x07,0x03,0x42,EOT
}},
245 {0x4, "Hardware monitor",
246 {0x30,0x60,0x61,0x70,EOT
},
247 {0x00,0x02,0x95,0x00,EOT
}},
248 {0x5, "Keyboard", /* Only documented on F71872F/FG. */
249 {0x30,0x60,0x61,0x70,0x72,0xf0,0xf1,EOT
},
250 {0x01,0x00,0x60,0x00,0x00,0x83,0x00,EOT
}},
252 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
253 0xe9,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,
255 {0x00,0x00,0x00,NANA
,0x00,0x00,0x00,0x00,0x00,0x00,
256 0x7f,0x00,0x7f,NANA
,0x00,0xff,NANA
,0x00,0x03,NANA
,
259 {0x30,0x60,0x61,EOT
},
260 {0x00,0x00,0x00,EOT
}},
262 {0x30,0xf0,0xf1,0xf4,0xf5,EOT
},
263 {0x00,0x00,0x61,0x06,0x3c,EOT
}},
265 {0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */
266 /* We assume reserved bits are read as 0. */
268 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
270 {0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00,
271 0x00,0x08,0x08,EOT
}},
273 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT
},
274 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT
}},
276 {0x30,0x60,0x61,0x70,0xf0,EOT
},
277 {0x01,0x03,0xf8,0x04,0x00,EOT
}},
279 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT
},
280 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT
}},
281 {0x3, "Parallel port",
282 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT
},
283 {0x01,0x03,0x78,0x07,0x03,0x42,EOT
}},
284 {0x4, "Hardware monitor",
285 {0x30,0x60,0x61,0x70,EOT
},
286 {0x01,0x02,0x95,0x00,EOT
}},
288 {0x30,0x60,0x61,0x70,0x72,0xf0,EOT
},
289 {0x01,0x00,0x60,0x00,0x00,0x83,EOT
}},
291 {0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0,
292 0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2,
294 {0x00,0x00,0xff,NANA
,0x00,0x00,0xff,NANA
,0x00,0x00,
295 0x0f,NANA
,0x00,0x00,0x0f,NANA
,0x00,0x00,0xff,NANA
,
298 {0x30,0x60,0x61,EOT
},
299 {0x00,0x00,0x00,EOT
}},
301 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
302 0xfb,0xfc,0xfd,0xfe,0xff,EOT
},
303 {0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
304 0x00,0x00,0x00,0x00,0x00,EOT
}},
306 {0x30,0xf0,0xf1,0xf4,0xf5,EOT
},
307 {0x00,0x00,0x01,0x06,0x1c,EOT
}},
309 {0x0604, "F71805F/FG", {
310 /* We assume reserved bits are read as 0. */
312 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT
},
313 {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT
}},
315 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT
},
316 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT
}},
318 {0x30,0x60,0x61,0x70,0xf0,EOT
},
319 {0x01,0x03,0xf8,0x04,0x00,EOT
}},
321 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT
},
322 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT
}},
323 {0x3, "Parallel port",
324 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT
},
325 {0x01,0x03,0x78,0x07,0x03,0x42,EOT
}},
326 {0x4, "Hardware monitor",
327 {0x30,0x60,0x61,0x70,EOT
},
328 {0x00,0x02,0x95,0x00,EOT
}},
330 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
331 0xe9,0xf0,0xf1,0xf3,0xf4,EOT
},
332 {0x00,0x00,0x00,NANA
,0x00,0x00,0x00,0x00,0x00,0x00,
333 0x00,0x00,NANA
,0x00,NANA
,EOT
}},
335 {0x30,0xf0,0xf1,EOT
},
336 {0x00,0x00,0x00,EOT
}},
338 {0x0581, "F8000", { /* Fintek/ASUS F8000 */
340 {0x0802, "F81216D/DG", {
345 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT
},
346 {NANA
,NANA
,NANA
,NANA
,0x00,0x40,EOT
}},
348 {0x30,0x60,0x61,0x70,0xf0,EOT
},
349 {NANA
,NANA
,NANA
,NANA
,0x00,EOT
}},
351 {0x30,0x60,0x61,0x70,0xf0,EOT
},
352 {NANA
,NANA
,NANA
,NANA
,0x00,EOT
}},
354 {0x30,0x60,0x61,0x70,0xf0,EOT
},
355 {NANA
,NANA
,NANA
,NANA
,0x00,EOT
}},
357 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT
},
358 {0x00,NANA
,NANA
,NANA
,NANA
,NANA
,EOT
}},
360 {0x1602, "F81216AD", {
365 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf4,0xf5,EOT
},
366 {NANA
,NANA
,NANA
,NANA
,0x00,0x40,0x00,0x00,EOT
}},
368 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT
},
369 {NANA
,NANA
,NANA
,NANA
,0x00,0x00,0x00,EOT
}},
371 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT
},
372 {NANA
,NANA
,NANA
,NANA
,0x00,0x00,0x00,EOT
}},
374 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT
},
375 {NANA
,NANA
,NANA
,NANA
,0x00,0x00,0x00,EOT
}},
377 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT
},
378 {0x00,NANA
,NANA
,NANA
,NANA
,NANA
,EOT
}},
380 {0x0407, "F81865F/F-I", {
382 {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a-1,0x2a-2,0x2b,0x2c,0x2d,EOT
},
383 {NANA
,0x00,0x07,0x04,0x19,0x34,NANA
,NANA
,NANA
,0x00,0x00,0x00,0x00,0x1f,0x00,0x08,EOT
}},
385 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT
},
386 {NANA
,0x03,0xf0,NANA
,NANA
,NANA
,NANA
,NANA
,EOT
}},
388 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT
},
389 {NANA
,0x03,0x78,NANA
,NANA
,NANA
,EOT
}},
391 {0x30,0x60,0x61,0x70,EOT
},
392 {NANA
,0x02,0x95,NANA
,EOT
}},
394 {0x30,0x60,0x61,0x70,0x72,0xfe,0xf0,EOT
},
395 {NANA
,0x00,0x60,NANA
,NANA
,NANA
,0x71,EOT
}},
397 {0x30,0x60,0x61,0x70,0xf1,0xf2,0xf3,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xe0,0xe1,0xe2,0xe3,0xef,0xd0,0xd1,0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,0x90,0x91,0x92,0x93,EOT
},
398 {NANA
,0x00,0x60,NANA
,0x00,NANA
,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,NANA
,0x00,NANA
,0x00,0xff,NANA
,0x00,0x00,0xff,NANA
,0x00,0x00,0xff,NANA
,0x00,0x00,0xff,NANA
,0x00,NANA
,NANA
,NANA
,NANA
,EOT
}},
400 {0x30,0x60,0x61,0xf5,0xf6,0xfa,EOT
},
401 {NANA
,0x00,0x00,0x00,0x00,NANA
,EOT
}},
403 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,EOT
},
404 {0x10,0x04,NANA
,NANA
,0x00,0x00,NANA
,NANA
,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT
}},
406 {0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT
},
407 {NANA
,NANA
,NANA
,NANA
,NANA
,0x06,NANA
,0x00,EOT
}},
409 {0x30,0x60,0x61,0x70,EOT
},
410 {NANA
,0x00,0x00,NANA
,EOT
}},
412 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT
},
413 {NANA
,0x03,0xf8,NANA
,NANA
,NANA
,0x00,0x00,EOT
}},
415 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT
},
416 {NANA
,0x02,0xf8,NANA
,NANA
,NANA
,0x00,0x00,EOT
}},
418 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT
},
419 {NANA
,0x03,0xe8,NANA
,NANA
,NANA
,0x00,0x00,EOT
}},
421 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT
},
422 {NANA
,0x02,0xe8,NANA
,NANA
,NANA
,0x00,0x00,EOT
}},
424 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT
},
425 {NANA
,0x00,0x00,NANA
,NANA
,NANA
,0x00,0x00,EOT
}},
427 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT
},
428 {NANA
,0x00,0x00,NANA
,NANA
,NANA
,0x00,0x00,EOT
}},
433 void probe_idregs_fintek(uint16_t port
)
437 probing_for("Fintek", "", port
);
439 enter_conf_mode_winbond_fintek_ite_8787(port
);
441 did
= regval(port
, DEVICE_ID_BYTE1_REG
);
442 did
|= (regval(port
, DEVICE_ID_BYTE2_REG
) << 8);
444 vid
= regval(port
, VENDOR_ID_BYTE1_REG
);
445 vid
|= (regval(port
, VENDOR_ID_BYTE2_REG
) << 8);
447 if (vid
!= FINTEK_VENDOR_ID
|| superio_unknown(reg_table
, did
)) {
449 printf(NOTFOUND
"vid=0x%04x, id=0x%04x\n", vid
, did
);
450 exit_conf_mode_winbond_fintek_ite_8787(port
);
454 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
455 get_superio_name(reg_table
, did
), vid
, did
, port
);
458 dump_superio("Fintek", reg_table
, port
, did
, LDN_SEL
);
460 exit_conf_mode_winbond_fintek_ite_8787(port
);
464 void probe_idregs_fintek_alternative(uint16_t port
)
468 probing_for("Fintek", "", port
);
470 enter_conf_mode_fintek_7777(port
);
472 did
= regval(port
, DEVICE_ID_BYTE1_REG
);
473 did
|= (regval(port
, DEVICE_ID_BYTE2_REG
) << 8);
475 vid
= regval(port
, VENDOR_ID_BYTE1_REG
);
476 vid
|= (regval(port
, VENDOR_ID_BYTE2_REG
) << 8);
478 if (vid
!= FINTEK_VENDOR_ID
|| superio_unknown(reg_table
, did
)) {
480 printf(NOTFOUND
"vid=0x%04x, id=0x%04x\n", vid
, did
);
481 exit_conf_mode_fintek_7777(port
);
485 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
486 get_superio_name(reg_table
, did
), vid
, did
, port
);
489 dump_superio("Fintek", reg_table
, port
, did
, LDN_SEL
);
491 exit_conf_mode_fintek_7777(port
);
494 void print_fintek_chips(void)
496 print_vendor_chips("Fintek", reg_table
);