src/mainboard/wyse/s50/romstage.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2010 Nils Jacobs
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc.
  19  */
  20
  21 #include <stdint.h>
  22 #include <device/pci_def.h>
  23 #include <arch/io.h>
  24 #include <device/pnp_def.h>
  25 #include <console/console.h>
  26 #include <lib.h>
  27 #include <cpu/x86/bist.h>
  28 #include <cpu/x86/msr.h>
  29 #include <cpu/amd/gx2def.h>
  30 #include <spd.h>
  31 #include "southbridge/amd/cs5536/early_smbus.c"
  32 #include "southbridge/amd/cs5536/early_setup.c"
  33
  34 static inline int spd_read_byte(unsigned int device, unsigned int address)
  35 {
  36         if (device != DIMM0)
  37                 return 0xFF;    /* No DIMM1, don't even try. */
  38
  39         return smbus_read_byte(device, address);
  40 }
  41
  42 #include <northbridge/amd/gx2/raminit.h>
  43 #include "northbridge/amd/gx2/pll_reset.c"
  44 #include "northbridge/amd/gx2/raminit.c"
  45 #include "lib/generic_sdram.c"
  46 #include "cpu/amd/geode_gx2/cpureginit.c"
  47 #include "cpu/amd/geode_gx2/syspreinit.c"
  48 #include "cpu/amd/geode_lx/msrinit.c"
  49
  50 #include <cpu/intel/romstage.h>
  51 void main(unsigned long bist)
  52 {
  53         static const struct mem_controller memctrl [] = {
  54                 {.channel0 = {DIMM0, DIMM1}}
  55         };
  56
  57         SystemPreInit();
  58
  59         cs5536_early_setup();
  60
  61         /* cs5536_disable_internal_uart  disable them. Set them up now... */
  62         cs5536_setup_onchipuart(1);
  63
  64         console_init();
  65
  66         /* Halt if there was a built in self test failure */
  67         report_bist_failure(bist);
  68
  69         pll_reset();
  70
  71         cpuRegInit();
  72         printk(BIOS_ERR, "done cpuRegInit\n");
  73
  74         sdram_initialize(1, memctrl);
  75         printk(BIOS_ERR, "ram setup done\n");
  76
  77         msr_init();
  78 }