src/mainboard/via/vt8454c/mptable.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc.
  19  */
  20
  21 #include <device/device.h>
  22 #include <device/pci.h>
  23 #include <arch/smp/mpspec.h>
  24 #include <arch/ioapic.h>
  25 #include <cpu/x86/lapic.h>
  26 #include <console/console.h>
  27 #include <string.h>
  28 #include <stdint.h>
  29
  30 static void *smp_write_config_table(void *v)
  31 {
  32         struct mp_config_table *mc;
  33         int isa_bus;
  34
  35         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
  36
  37         mptable_init(mc, LOCAL_APIC_ADDR);
  38
  39         smp_write_processors(mc);
  40         mptable_write_buses(mc, NULL, &isa_bus);
  41
  42         /* I/O APICs:   APIC ID Version State Address */
  43         smp_write_ioapic(mc, 2, 17, VIO_APIC_VADDR);
  44
  45         mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
  46
  47         /* I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
  48         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x14);
  49         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x41, 0x2, 0x16);
  50         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x42, 0x2, 0x15);
  51         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x43, 0x2, 0x17);
  52         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x80, 0x4, 0x2, 0x11);
  53         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x11);
  54         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x2, 0x10, 0x2, 0x11);
  55
  56         /*Local Ints:   Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
  57         mptable_lintsrc(mc, 0x0);
  58
  59         /* Compute the checksums */
  60         return mptable_finalize(mc);
  61 }
  62
  63 unsigned long write_smp_table(unsigned long addr)
  64 {
  65         void *v;
  66         v = smp_write_floating_table(addr, 0);
  67         return (unsigned long)smp_write_config_table(v);
  68 }