Remove address from GPLv2 headers
[coreboot.git] / src / mainboard / lenovo / x201 / dsdt.asl
blob20d647effad021fd7ffc1be257093ef7648507fa
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2007-2009 coresystems GmbH
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; version 2 of
9  * the License.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc.
19  */
21 #define THINKPAD_EC_GPE 17
22 #define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
23 #define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
24 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
25 #define EC_LENOVO_H8_ME_WORKAROUND 1
26 #define HAVE_LCD_SCREEN 1
28 DefinitionBlock(
29         "dsdt.aml",
30         "DSDT",
31         0x03,           /* DSDT revision: ACPI v3.0 */
32         "COREv4",       /* OEM id */
33         "COREBOOT",     /* OEM table id */
34         0x20130325      /* OEM revision */
37         /* Some generic macros */
38         #include "acpi/platform.asl"
40         /* global NVS and variables */
41         #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
43         /* General Purpose Events */
44         #include "acpi/gpe.asl"
46         #include <cpu/intel/model_206ax/acpi/cpu.asl>
48         Scope (\_SB) {
49                 Device (PCI0)
50                 {
51                         #include <northbridge/intel/nehalem/acpi/nehalem.asl>
52                         #include <southbridge/intel/bd82x6x/acpi/pch.asl>
53                 }
54                 Device (UNCR)
55                 {
56                         Name (_BBN, 0xFF)
57                         Name (_ADR, 0x00)
58                         Name (RID, 0x00)
59                         Name (_HID, EisaId ("PNP0A03"))
60                         Name (_CRS, ResourceTemplate ()
61                                 {
62                                 WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
63                                                 0x0000,      /* Granularity */
64                                                 0x00FF,      /* Range Minimum */
65                                                 0x00FF,      /* Range Maximum */
66                                                 0x0000,      /* Translation Offset */
67                                                 0x0001,      /* Length */
68                                                 ,, )
69                                 })
70                         Device (SAD)
71                         {
72                                 Name (_ADR, 0x01)
73                                 Name (RID, 0x00)
74                                 OperationRegion (SADC, PCI_Config, 0x00, 0x0100)
75                                 Field (SADC, DWordAcc, NoLock, Preserve)
76                                 {
77                                         Offset (0x40),
78                                         PAM0,   8,
79                                         PAM1,   8,
80                                         PAM2,   8,
81                                         PAM3,   8,
82                                         PAM4,   8,
83                                         PAM5,   8,
84                                         PAM6,   8
85                                 }
86                         }
87                 }
88         }
90         /* Chipset specific sleep states */
91         #include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
93         /* Dock support code */
94         #include "acpi/dock.asl"