Remove address from GPLv2 headers
[coreboot.git] / src / arch / arm / stages.c
blob01506d95a4380ece6cdfbe3be0f46468aea48d48
1 /*
2 * This file is part of the coreboot project.
4 * Copyright 2012 Google Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc.
21 * This file contains entry/exit functions for each stage during coreboot
22 * execution (bootblock entry and ramstage exit will depend on external
23 * loading).
25 * Entry points should be set in the linker script and honored by CBFS,
26 * so text section layout shouldn't matter. Still, it doesn't hurt to put
27 * stage_entry first (which XXXstage.ld will do automatically through the
28 * .text.stage_entry section created by -ffunction-sections).
31 #include <arch/stages.h>
32 #include <arch/cache.h>
34 /**
35 * generic stage entry point. override this if board specific code is needed.
37 __attribute__((weak)) void stage_entry(void)
39 main();
42 /* we had marked 'doit' as 'noreturn'.
43 * There is no apparent harm in leaving it as something we can return from, and in the one
44 * case where we call a payload, the payload is allowed to return.
45 * Hence, leave it as something we can return from.
47 void stage_exit(void *addr)
49 void (*doit)(void) = addr;
51 * Most stages load code so we need to sync caches here. Should maybe
52 * go into cbfs_load_stage() instead...
54 cache_sync_instructions();
55 doit();