src/northbridge/amd/agesa/family10/reset_test.h

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2011 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  *
  19  * copy from src/northbridge/amd/amdfam10/reset_test.c
  20  */
  21
  22 #ifndef _RESET_TEST_H_
  23 #define _RESET_TEST_H_
  24
  25 #include "amdfam10.h"   /* NODE_PCI */
  26
  27 #define NODE_ID                 0x60
  28 #define HT_INIT_CONTROL         0x6c
  29 #define HTIC_ColdR_Detect       (1<<4)
  30 #define HTIC_BIOSR_Detect       (1<<5)
  31 #define HTIC_INIT_Detect        (1<<6)
  32
  33 static inline u32 warm_reset_detect(u8 nodeid)
  34 {
  35         u32 htic;
  36         device_t device;
  37         device = NODE_PCI(nodeid, 0);
  38         htic = pci_io_read_config32(device, HT_INIT_CONTROL);
  39         return (htic & HTIC_ColdR_Detect) && !(htic & HTIC_BIOSR_Detect);
  40 }
  41
  42 static inline void distinguish_cpu_resets(u8 nodeid)
  43 {
  44         u32 htic;
  45         device_t device;
  46         device = NODE_PCI(nodeid, 0);
  47         htic = pci_io_read_config32(device, HT_INIT_CONTROL);
  48         htic |= HTIC_ColdR_Detect | HTIC_BIOSR_Detect | HTIC_INIT_Detect;
  49         pci_io_write_config32(device, HT_INIT_CONTROL, htic);
  50 }
  51
  52 #endif