2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
25 0x03, /* DSDT revision: ACPI v3.0 */
26 "COREv4", /* OEM id */
27 "COREBOOT", /* OEM table id */
28 0x20140108 /* OEM revision */
31 /* Some generic macros */
32 #include "acpi/platform.asl"
34 /* global NVS and variables */
35 #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
37 /* General Purpose Events */
38 #include "acpi/gpe.asl"
40 #include <cpu/intel/model_206ax/acpi/cpu.asl>
45 #include <northbridge/intel/nehalem/acpi/nehalem.asl>
46 #include <southbridge/intel/bd82x6x/acpi/pch.asl>
53 Name (_HID, EisaId ("PNP0A03"))
54 Name (_CRS, ResourceTemplate ()
56 WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
57 0x0000, /* Granularity */
58 0x00FF, /* Range Minimum */
59 0x00FF, /* Range Maximum */
60 0x0000, /* Translation Offset */
68 OperationRegion (SADC, PCI_Config, 0x00, 0x0100)
69 Field (SADC, DWordAcc, NoLock, Preserve)
84 #include "acpi/video.asl"
86 /* Chipset specific sleep states */
87 #include <southbridge/intel/i82801gx/acpi/sleepstates.asl>