src/device/pci_ops_mmconf.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <console/console.h>
  15 #include <arch/io.h>
  16 #include <device/pci.h>
  17 #include <device/pci_ids.h>
  18 #include <device/pci_ops.h>
  19
  20 #if !defined(CONFIG_MMCONF_BASE_ADDRESS) || !CONFIG_MMCONF_BASE_ADDRESS
  21 #error "CONFIG_MMCONF_BASE_ADDRESS needs to be non-zero!"
  22 #endif
  23
  24 /*
  25  * Functions for accessing PCI configuration space with mmconf accesses
  26  */
  27
  28 #define PCI_MMIO_ADDR(SEGBUS, DEVFN, WHERE, MASK)       \
  29                         ((void *)(((uintptr_t)CONFIG_MMCONF_BASE_ADDRESS |\
  30                                    (((SEGBUS) & 0xFFF) << 20) |\
  31                                    (((DEVFN) & 0xFF) << 12) |\
  32                                    ((WHERE) & 0xFFF)) & ~MASK))
  33
  34 static uint8_t pci_mmconf_read_config8(struct bus *pbus, int bus, int devfn,
  35                                        int where)
  36 {
  37         return read8(PCI_MMIO_ADDR(bus, devfn, where, 0));
  38 }
  39
  40 static uint16_t pci_mmconf_read_config16(struct bus *pbus, int bus, int devfn,
  41                                          int where)
  42 {
  43         return read16(PCI_MMIO_ADDR(bus, devfn, where, 1));
  44 }
  45
  46 static uint32_t pci_mmconf_read_config32(struct bus *pbus, int bus, int devfn,
  47                                          int where)
  48 {
  49         return read32(PCI_MMIO_ADDR(bus, devfn, where, 3));
  50 }
  51
  52 static void pci_mmconf_write_config8(struct bus *pbus, int bus, int devfn,
  53                                      int where, uint8_t value)
  54 {
  55         write8(PCI_MMIO_ADDR(bus, devfn, where, 0), value);
  56 }
  57
  58 static void pci_mmconf_write_config16(struct bus *pbus, int bus, int devfn,
  59                                       int where, uint16_t value)
  60 {
  61         write16(PCI_MMIO_ADDR(bus, devfn, where, 1), value);
  62 }
  63
  64 static void pci_mmconf_write_config32(struct bus *pbus, int bus, int devfn,
  65                                       int where, uint32_t value)
  66 {
  67         write32(PCI_MMIO_ADDR(bus, devfn, where, 3), value);
  68 }
  69
  70 static const struct pci_bus_operations pci_ops_mmconf = {
  71         .read8 = pci_mmconf_read_config8,
  72         .read16 = pci_mmconf_read_config16,
  73         .read32 = pci_mmconf_read_config32,
  74         .write8 = pci_mmconf_write_config8,
  75         .write16 = pci_mmconf_write_config16,
  76         .write32 = pci_mmconf_write_config32,
  77 };
  78
  79 const struct pci_bus_operations *pci_bus_default_ops(struct device *dev)
  80 {
  81         return &pci_ops_mmconf;
  82 }