src/mainboard/supermicro/h8qme_fam10/irq_tables.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007 AMD
   5  * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <console/console.h>
  19 #include <device/pci.h>
  20 #include <string.h>
  21 #include <stdint.h>
  22 #include <arch/pirq_routing.h>
  23
  24 #include <cpu/amd/amdfam10_sysconf.h>
  25 #include "mb_sysconf.h"
  26
  27 static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
  28                             uint8_t devfn, uint8_t link0, uint16_t bitmap0,
  29                             uint8_t link1, uint16_t bitmap1, uint8_t link2,
  30                             uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
  31                             uint8_t slot, uint8_t rfu)
  32 {
  33         pirq_info->bus = bus;
  34         pirq_info->devfn = devfn;
  35         pirq_info->irq[0].link = link0;
  36         pirq_info->irq[0].bitmap = bitmap0;
  37         pirq_info->irq[1].link = link1;
  38         pirq_info->irq[1].bitmap = bitmap1;
  39         pirq_info->irq[2].link = link2;
  40         pirq_info->irq[2].bitmap = bitmap2;
  41         pirq_info->irq[3].link = link3;
  42         pirq_info->irq[3].bitmap = bitmap3;
  43         pirq_info->slot = slot;
  44         pirq_info->rfu = rfu;
  45 }
  46
  47 unsigned long write_pirq_routing_table(unsigned long addr)
  48 {
  49
  50         struct irq_routing_table *pirq;
  51         struct irq_info *pirq_info;
  52         unsigned int slot_num;
  53         uint8_t *v;
  54         struct mb_sysconf_t *m;
  55         unsigned int sbdn;
  56
  57         uint8_t sum = 0;
  58         int i;
  59
  60         sbdn = sysconf.sbdn;
  61         m = sysconf.mb;
  62
  63         /* Align the table to be 16 byte aligned. */
  64         addr += 15;
  65         addr &= ~15;
  66
  67         /* This table must be between 0xf0000 & 0x100000 */
  68         printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
  69
  70         pirq = (void *)(addr);
  71         v = (uint8_t *) (addr);
  72
  73         pirq->signature = PIRQ_SIGNATURE;
  74         pirq->version = PIRQ_VERSION;
  75
  76         pirq->rtr_bus = m->bus_mcp55[0];
  77         pirq->rtr_devfn = PCI_DEVFN(sbdn + 6, 0);
  78
  79         pirq->exclusive_irqs = 0;
  80
  81         pirq->rtr_vendor = 0x10de;
  82         pirq->rtr_device = 0x0364;
  83
  84         pirq->miniport_data = 0;
  85
  86         memset(pirq->rfu, 0, sizeof(pirq->rfu));
  87
  88         pirq_info = (void *)(&pirq->checksum + 1);
  89         slot_num = 0;
  90 //pci bridge
  91         write_pirq_info(pirq_info, m->bus_mcp55[0], PCI_DEVFN(sbdn + 6, 0), 0x1,
  92                         0x4ca0, 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
  93         pirq_info++;
  94         slot_num++;
  95
  96         for (i = 1; i < sysconf.hc_possible_num; i++) {
  97                 if (!(sysconf.pci1234[i] & 0x1))
  98                         continue;
  99                 unsigned int busn = (sysconf.pci1234[i] >> 12) & 0xff;
 100                 unsigned int devn = sysconf.hcdn[i] & 0xff;
 101
 102                 write_pirq_info(pirq_info, busn, PCI_DEVFN(devn, 0), 0x1, 0x4ca0,
 103                                 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
 104                 pirq_info++;
 105                 slot_num++;
 106         }
 107
 108 #if CONFIG_CBB
 109         write_pirq_info(pirq_info, CONFIG_CBB, PCI_DEVFN(0, 0), 0x1, 0x4ca0, 0x2,
 110                         0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
 111         pirq_info++;
 112         slot_num++;
 113         if (sysconf.nodes > 32) {
 114                 write_pirq_info(pirq_info, CONFIG_CBB - 1, PCI_DEVFN(0, 0), 0x1,
 115                                 0x4ca0, 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0,
 116                                 0, 0);
 117                 pirq_info++;
 118                 slot_num++;
 119         }
 120 #endif
 121
 122         pirq->size = 32 + 16 * slot_num;
 123
 124         for (i = 0; i < pirq->size; i++)
 125                 sum += v[i];
 126
 127         sum = pirq->checksum - sum;
 128
 129         if (sum != pirq->checksum) {
 130                 pirq->checksum = sum;
 131         }
 132
 133         printk(BIOS_INFO, "done.\n");
 134
 135         return (unsigned long)pirq_info;
 136
 137 }