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treewide: replace GPLv2 long form headers with SPDX header
[coreboot.git] / util / msrtool / cs5536.c
blobce28c4d6552375acae86c14b3186bed8603cdc09
1 /* This file is part of msrtool. */
2 /* SPDX-License-Identifier: GPL-2.0-only */
3
4 #include "msrtool.h"
5
6 int cs5536_probe(const struct targetdef *target, const struct cpuid_t *id) {
7 return (NULL != pci_dev_find(0x1022, 0x2090));
8 }
9
10 /**
11 * Documentation referenced:
12 *
13 * 33238G: AMD Geode(tm) CS5536 Companion Device Data Book
14 * http://www.amd.com/files/connectivitysolutions/geode/geode_lx/33238G_cs5536_db.pdf
15 *
16 */
17
18 const struct msrdef cs5536_msrs[] = {
19 /* 0x51400008-0x5140000f per 33238G pages 356-361 */
20 /* 0x51400015 per 33238G pages 365-366 */
21 /* 0x51400020-0x51400027 per 33238G pages 379-385 */
22 { 0x51400008, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_IRQ", "Local BAR - IRQ Mapper", {
23 { 63, 15, RESERVED },
24 { 48, 1, RESERVED },
25 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
26 { BITVAL_EOT }
27 }},
28 { 43, 11, RESERVED },
29 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
30 { MSR1(0), "Disable LBAR" },
31 { MSR1(1), "Enable LBAR" },
32 { BITVAL_EOT }
33 }},
34 { 31, 15, RESERVED },
35 { 16, 1, RESERVED },
36 { 15, 11, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
37 { BITVAL_EOT }
38 }},
39 { 4, 5, RESERVED },
40 { BITS_EOT }
41 }},
42 { 0x51400009, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_KEL", "Local BAR - Keyboard Emulation Logic from USB", {
43 { 63, 20, "MEM_MASK", "Memory Address Mask Value", PRESENT_HEX, {
44 { BITVAL_EOT }
45 }},
46 { 43, 11, RESERVED },
47 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
48 { MSR1(0), "Disable LBAR" },
49 { MSR1(1), "Enable LBAR" },
50 { BITVAL_EOT }
51 }},
52 { 31, 20, "BASE_ADDR", "Base Address in Memory Space", PRESENT_HEX, {
53 { BITVAL_EOT }
54 }},
55 { 11, 12, RESERVED },
56 { BITS_EOT }
57 }},
58 /* 0x5140000a is not mentioned in the databook */
59 { 0x5140000b, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_SMB", "Local BAR - System Management Bus", {
60 { 63, 15, RESERVED },
61 { 48, 1, RESERVED },
62 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
63 { BITVAL_EOT }
64 }},
65 { 43, 11, RESERVED },
66 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
67 { MSR1(0), "Disable LBAR" },
68 { MSR1(1), "Enable LBAR" },
69 { BITVAL_EOT }
70 }},
71 { 31, 15, RESERVED },
72 { 16, 1, RESERVED },
73 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
74 { BITVAL_EOT }
75 }},
76 { 7, 8, RESERVED },
77 { BITS_EOT }
78 }},
79 { 0x5140000c, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_GPIO", "Local BAR - GPIO and Input Conditioning Functions", {
80 { 63, 15, RESERVED },
81 { 48, 1, RESERVED },
82 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
83 { BITVAL_EOT }
84 }},
85 { 43, 11, RESERVED },
86 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
87 { MSR1(0), "Disable LBAR" },
88 { MSR1(1), "Enable LBAR" },
89 { BITVAL_EOT }
90 }},
91 { 31, 15, RESERVED },
92 { 16, 1, RESERVED },
93 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
94 { BITVAL_EOT }
95 }},
96 { 7, 8, RESERVED },
97 { BITS_EOT }
98 }},
99 { 0x5140000d, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_MFGPT", "Local BAR - MFGPTs", {
100 { 63, 15, RESERVED },
101 { 48, 1, RESERVED },
102 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
103 { BITVAL_EOT }
104 }},
105 { 43, 11, RESERVED },
106 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
107 { MSR1(0), "Disable LBAR" },
108 { MSR1(1), "Enable LBAR" },
109 { BITVAL_EOT }
110 }},
111 { 31, 15, RESERVED },
112 { 16, 1, RESERVED },
113 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
114 { BITVAL_EOT }
115 }},
116 { 7, 8, RESERVED },
117 { BITS_EOT }
118 }},
119 { 0x5140000e, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_ACPI", "Local BAR - ACPI", {
120 { 63, 15, RESERVED },
121 { 48, 1, RESERVED },
122 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
123 { BITVAL_EOT }
124 }},
125 { 43, 11, RESERVED },
126 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
127 { MSR1(0), "Disable LBAR" },
128 { MSR1(1), "Enable LBAR" },
129 { BITVAL_EOT }
130 }},
131 { 31, 15, RESERVED },
132 { 16, 1, RESERVED },
133 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
134 { BITVAL_EOT }
135 }},
136 { 7, 8, RESERVED },
137 { BITS_EOT }
138 }},
139 { 0x5140000f, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_PMS", "Local BAR - Power Management Support", {
140 { 63, 15, RESERVED },
141 { 48, 1, RESERVED },
142 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
143 { BITVAL_EOT }
144 }},
145 { 43, 11, RESERVED },
146 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
147 { MSR1(0), "Disable LBAR" },
148 { MSR1(1), "Enable LBAR" },
149 { BITVAL_EOT }
150 }},
151 { 31, 15, RESERVED },
152 { 16, 1, RESERVED },
153 { 15, 9, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
154 { BITVAL_EOT }
155 }},
156 { 6, 7, RESERVED },
157 { BITS_EOT }
158 }},
159 { 0x51400015, MSRTYPE_RDWR, MSR2(0, 0x70), "DIVIL_BALL_OPTS", "Ball Options Control", {
160 { 63, 32, RESERVED },
161 { 31, 20, RESERVED },
162 { 11, 2, "SEC_BOOT_LOC", "Secondary Boot Location", PRESENT_BIN, {
163 { MSR1(0), "LPC ROM" },
164 { MSR1(2), "NOR Flash on IDE" },
165 { MSR1(3), "Firmware Hub" },
166 { BITVAL_EOT }
167 }},
168 { 9, 2, "BOOT_OP_LATCHED", "Latched Value of Boot Option", PRESENT_BIN, {
169 { MSR1(0), "LPC ROM" },
170 { MSR1(2), "NOR Flash on IDE" },
171 { MSR1(3), "Firmware Hub" },
172 { BITVAL_EOT }
173 }},
174 { 7, 1, RESERVED },
175 { 6, 1, "PIN_OPT_LALL", "All LPC Pin Option Selection", PRESENT_BIN, {
176 { MSR1(0), "All LPC pins become GPIOs including LPC_DRQ# and LPC_SERIRQ" },
177 { MSR1(1), "All LPC pins are controlled by the LPC controller except LPC_DRQ# and LPC_SERIRQ (bits [5:4])" },
178 { BITVAL_EOT }
179 }},
180 { 5, 1, "PIN_OPT_LIRQ", "LPC_SERIRQ or GPIO21 Pin Option Selection", PRESENT_BIN, {
181 { MSR1(0), "Ball G2 is GPIO21" },
182 { MSR1(1), "Ball G2 functions as LPC_SERIRQ" },
183 { BITVAL_EOT }
184 }},
185 { 4, 1, "PIN_OPT_LDRQ", "LPC_DRQ# or GPIO20 Pin Option Selection", PRESENT_BIN, {
186 { MSR1(0), "Ball G1 is GPIO20" },
187 { MSR1(1), "Ball G1 functions as LPC_DRQ#" },
188 { BITVAL_EOT }
189 }},
190 { 3, 2, "PRI_BOOT_LOC", "Primary Boot Location", PRESENT_BIN, {
191 { MSR1(0), "LPC ROM" },
192 { MSR1(2), "NOR Flash on IDE" },
193 { MSR1(3), "Firmware Hub" },
194 { BITVAL_EOT }
195 }},
196 { 1, 1, RESERVED },
197 { 0, 1, "PIN_OPT_IDE", "IDE or Flash Controller Pin Function Selection", PRESENT_BIN, {
198 { MSR1(0), "All IDE pins associated with Flash Controller" },
199 { MSR1(1), "All IDE pins associated with IDE Controller" },
200 { BITVAL_EOT }
201 }},
202 }},
203 { 0x51400020, MSRTYPE_RDWR, MSR2(0, 0), "PIC_YSEL_LOW", "IRQ Mapper Unrestricted Y Select Low", {
204 { 63, 32, RESERVED },
205 { 31, 4, "MAP_Y7", "Map Unrestricted Y Input 7", PRESENT_BIN, {
206 { MSR1(0), "Disable" },
207 { MSR1(1), "Interrupt Group 1" },
208 { MSR1(2), "Interrupt Group 2" },
209 { MSR1(3), "Interrupt Group 3" },
210 { MSR1(4), "Interrupt Group 4" },
211 { MSR1(5), "Interrupt Group 5" },
212 { MSR1(6), "Interrupt Group 6" },
213 { MSR1(7), "Interrupt Group 7" },
214 { MSR1(8), "Interrupt Group 8" },
215 { MSR1(9), "Interrupt Group 9" },
216 { MSR1(10), "Interrupt Group 10" },
217 { MSR1(11), "Interrupt Group 11" },
218 { MSR1(12), "Interrupt Group 12" },
219 { MSR1(13), "Interrupt Group 13" },
220 { MSR1(14), "Interrupt Group 14" },
221 { MSR1(15), "Interrupt Group 15" },
222 { BITVAL_EOT }
223 }},
224 { 27, 4, "MAP_Y6", "Map Unrestricted Y Input 6", PRESENT_BIN, {
225 { MSR1(0), "Disable" },
226 { MSR1(1), "Interrupt Group 1" },
227 { MSR1(2), "Interrupt Group 2" },
228 { MSR1(3), "Interrupt Group 3" },
229 { MSR1(4), "Interrupt Group 4" },
230 { MSR1(5), "Interrupt Group 5" },
231 { MSR1(6), "Interrupt Group 6" },
232 { MSR1(7), "Interrupt Group 7" },
233 { MSR1(8), "Interrupt Group 8" },
234 { MSR1(9), "Interrupt Group 9" },
235 { MSR1(10), "Interrupt Group 10" },
236 { MSR1(11), "Interrupt Group 11" },
237 { MSR1(12), "Interrupt Group 12" },
238 { MSR1(13), "Interrupt Group 13" },
239 { MSR1(14), "Interrupt Group 14" },
240 { MSR1(15), "Interrupt Group 15" },
241 { BITVAL_EOT }
242 }},
243 { 23, 4, "MAP_Y5", "Map Unrestricted Y Input 5", PRESENT_BIN, {
244 { MSR1(0), "Disable" },
245 { MSR1(1), "Interrupt Group 1" },
246 { MSR1(2), "Interrupt Group 2" },
247 { MSR1(3), "Interrupt Group 3" },
248 { MSR1(4), "Interrupt Group 4" },
249 { MSR1(5), "Interrupt Group 5" },
250 { MSR1(6), "Interrupt Group 6" },
251 { MSR1(7), "Interrupt Group 7" },
252 { MSR1(8), "Interrupt Group 8" },
253 { MSR1(9), "Interrupt Group 9" },
254 { MSR1(10), "Interrupt Group 10" },
255 { MSR1(11), "Interrupt Group 11" },
256 { MSR1(12), "Interrupt Group 12" },
257 { MSR1(13), "Interrupt Group 13" },
258 { MSR1(14), "Interrupt Group 14" },
259 { MSR1(15), "Interrupt Group 15" },
260 { BITVAL_EOT }
261 }},
262 { 19, 4, "MAP_Y4", "Map Unrestricted Y Input 4", PRESENT_BIN, {
263 { MSR1(0), "Disable" },
264 { MSR1(1), "Interrupt Group 1" },
265 { MSR1(2), "Interrupt Group 2" },
266 { MSR1(3), "Interrupt Group 3" },
267 { MSR1(4), "Interrupt Group 4" },
268 { MSR1(5), "Interrupt Group 5" },
269 { MSR1(6), "Interrupt Group 6" },
270 { MSR1(7), "Interrupt Group 7" },
271 { MSR1(8), "Interrupt Group 8" },
272 { MSR1(9), "Interrupt Group 9" },
273 { MSR1(10), "Interrupt Group 10" },
274 { MSR1(11), "Interrupt Group 11" },
275 { MSR1(12), "Interrupt Group 12" },
276 { MSR1(13), "Interrupt Group 13" },
277 { MSR1(14), "Interrupt Group 14" },
278 { MSR1(15), "Interrupt Group 15" },
279 { BITVAL_EOT }
280 }},
281 { 15, 4, "MAP_Y3", "Map Unrestricted Y Input 3", PRESENT_BIN, {
282 { MSR1(0), "Disable" },
283 { MSR1(1), "Interrupt Group 1" },
284 { MSR1(2), "Interrupt Group 2" },
285 { MSR1(3), "Interrupt Group 3" },
286 { MSR1(4), "Interrupt Group 4" },
287 { MSR1(5), "Interrupt Group 5" },
288 { MSR1(6), "Interrupt Group 6" },
289 { MSR1(7), "Interrupt Group 7" },
290 { MSR1(8), "Interrupt Group 8" },
291 { MSR1(9), "Interrupt Group 9" },
292 { MSR1(10), "Interrupt Group 10" },
293 { MSR1(11), "Interrupt Group 11" },
294 { MSR1(12), "Interrupt Group 12" },
295 { MSR1(13), "Interrupt Group 13" },
296 { MSR1(14), "Interrupt Group 14" },
297 { MSR1(15), "Interrupt Group 15" },
298 { BITVAL_EOT }
299 }},
300 { 11, 4, "MAP_Y2", "Map Unrestricted Y Input 2", PRESENT_BIN, {
301 { MSR1(0), "Disable" },
302 { MSR1(1), "Interrupt Group 1" },
303 { MSR1(2), "Interrupt Group 2" },
304 { MSR1(3), "Interrupt Group 3" },
305 { MSR1(4), "Interrupt Group 4" },
306 { MSR1(5), "Interrupt Group 5" },
307 { MSR1(6), "Interrupt Group 6" },
308 { MSR1(7), "Interrupt Group 7" },
309 { MSR1(8), "Interrupt Group 8" },
310 { MSR1(9), "Interrupt Group 9" },
311 { MSR1(10), "Interrupt Group 10" },
312 { MSR1(11), "Interrupt Group 11" },
313 { MSR1(12), "Interrupt Group 12" },
314 { MSR1(13), "Interrupt Group 13" },
315 { MSR1(14), "Interrupt Group 14" },
316 { MSR1(15), "Interrupt Group 15" },
317 { BITVAL_EOT }
318 }},
319 { 7, 4, "MAP_Y1", "Map Unrestricted Y Input 1", PRESENT_BIN, {
320 { MSR1(0), "Disable" },
321 { MSR1(1), "Interrupt Group 1" },
322 { MSR1(2), "Interrupt Group 2" },
323 { MSR1(3), "Interrupt Group 3" },
324 { MSR1(4), "Interrupt Group 4" },
325 { MSR1(5), "Interrupt Group 5" },
326 { MSR1(6), "Interrupt Group 6" },
327 { MSR1(7), "Interrupt Group 7" },
328 { MSR1(8), "Interrupt Group 8" },
329 { MSR1(9), "Interrupt Group 9" },
330 { MSR1(10), "Interrupt Group 10" },
331 { MSR1(11), "Interrupt Group 11" },
332 { MSR1(12), "Interrupt Group 12" },
333 { MSR1(13), "Interrupt Group 13" },
334 { MSR1(14), "Interrupt Group 14" },
335 { MSR1(15), "Interrupt Group 15" },
336 { BITVAL_EOT }
337 }},
338 { 3, 4, "MAP_Y0", "Map Unrestricted Y Input 0", PRESENT_BIN, {
339 { MSR1(0), "Disable" },
340 { MSR1(1), "Interrupt Group 1" },
341 { MSR1(2), "Interrupt Group 2" },
342 { MSR1(3), "Interrupt Group 3" },
343 { MSR1(4), "Interrupt Group 4" },
344 { MSR1(5), "Interrupt Group 5" },
345 { MSR1(6), "Interrupt Group 6" },
346 { MSR1(7), "Interrupt Group 7" },
347 { MSR1(8), "Interrupt Group 8" },
348 { MSR1(9), "Interrupt Group 9" },
349 { MSR1(10), "Interrupt Group 10" },
350 { MSR1(11), "Interrupt Group 11" },
351 { MSR1(12), "Interrupt Group 12" },
352 { MSR1(13), "Interrupt Group 13" },
353 { MSR1(14), "Interrupt Group 14" },
354 { MSR1(15), "Interrupt Group 15" },
355 { BITVAL_EOT }
356 }},
357 { BITS_EOT }
358 }},
359 { 0x51400021, MSRTYPE_RDWR, MSR2(0, 0), "PIC_YSEL_HIGH", "IRQ Mapper Unrestricted Y Select High", {
360 { 63, 32, RESERVED },
361 { 31, 4, "MAP_Y15", "Map Unrestricted Y Input 15", PRESENT_BIN, {
362 { MSR1(0), "Disable" },
363 { MSR1(1), "Interrupt Group 1" },
364 { MSR1(2), "Interrupt Group 2" },
365 { MSR1(3), "Interrupt Group 3" },
366 { MSR1(4), "Interrupt Group 4" },
367 { MSR1(5), "Interrupt Group 5" },
368 { MSR1(6), "Interrupt Group 6" },
369 { MSR1(7), "Interrupt Group 7" },
370 { MSR1(8), "Interrupt Group 8" },
371 { MSR1(9), "Interrupt Group 9" },
372 { MSR1(10), "Interrupt Group 10" },
373 { MSR1(11), "Interrupt Group 11" },
374 { MSR1(12), "Interrupt Group 12" },
375 { MSR1(13), "Interrupt Group 13" },
376 { MSR1(14), "Interrupt Group 14" },
377 { MSR1(15), "Interrupt Group 15" },
378 { BITVAL_EOT }
379 }},
380 { 27, 4, "MAP_Y14", "Map Unrestricted Y Input 14", PRESENT_BIN, {
381 { MSR1(0), "Disable" },
382 { MSR1(1), "Interrupt Group 1" },
383 { MSR1(2), "Interrupt Group 2" },
384 { MSR1(3), "Interrupt Group 3" },
385 { MSR1(4), "Interrupt Group 4" },
386 { MSR1(5), "Interrupt Group 5" },
387 { MSR1(6), "Interrupt Group 6" },
388 { MSR1(7), "Interrupt Group 7" },
389 { MSR1(8), "Interrupt Group 8" },
390 { MSR1(9), "Interrupt Group 9" },
391 { MSR1(10), "Interrupt Group 10" },
392 { MSR1(11), "Interrupt Group 11" },
393 { MSR1(12), "Interrupt Group 12" },
394 { MSR1(13), "Interrupt Group 13" },
395 { MSR1(14), "Interrupt Group 14" },
396 { MSR1(15), "Interrupt Group 15" },
397 { BITVAL_EOT }
398 }},
399 { 23, 4, "MAP_Y13", "Map Unrestricted Y Input 13", PRESENT_BIN, {
400 { MSR1(0), "Disable" },
401 { MSR1(1), "Interrupt Group 1" },
402 { MSR1(2), "Interrupt Group 2" },
403 { MSR1(3), "Interrupt Group 3" },
404 { MSR1(4), "Interrupt Group 4" },
405 { MSR1(5), "Interrupt Group 5" },
406 { MSR1(6), "Interrupt Group 6" },
407 { MSR1(7), "Interrupt Group 7" },
408 { MSR1(8), "Interrupt Group 8" },
409 { MSR1(9), "Interrupt Group 9" },
410 { MSR1(10), "Interrupt Group 10" },
411 { MSR1(11), "Interrupt Group 11" },
412 { MSR1(12), "Interrupt Group 12" },
413 { MSR1(13), "Interrupt Group 13" },
414 { MSR1(14), "Interrupt Group 14" },
415 { MSR1(15), "Interrupt Group 15" },
416 { BITVAL_EOT }
417 }},
418 { 19, 4, "MAP_Y12", "Map Unrestricted Y Input 12", PRESENT_BIN, {
419 { MSR1(0), "Disable" },
420 { MSR1(1), "Interrupt Group 1" },
421 { MSR1(2), "Interrupt Group 2" },
422 { MSR1(3), "Interrupt Group 3" },
423 { MSR1(4), "Interrupt Group 4" },
424 { MSR1(5), "Interrupt Group 5" },
425 { MSR1(6), "Interrupt Group 6" },
426 { MSR1(7), "Interrupt Group 7" },
427 { MSR1(8), "Interrupt Group 8" },
428 { MSR1(9), "Interrupt Group 9" },
429 { MSR1(10), "Interrupt Group 10" },
430 { MSR1(11), "Interrupt Group 11" },
431 { MSR1(12), "Interrupt Group 12" },
432 { MSR1(13), "Interrupt Group 13" },
433 { MSR1(14), "Interrupt Group 14" },
434 { MSR1(15), "Interrupt Group 15" },
435 { BITVAL_EOT }
436 }},
437 { 15, 4, "MAP_Y11", "Map Unrestricted Y Input 11", PRESENT_BIN, {
438 { MSR1(0), "Disable" },
439 { MSR1(1), "Interrupt Group 1" },
440 { MSR1(2), "Interrupt Group 2" },
441 { MSR1(3), "Interrupt Group 3" },
442 { MSR1(4), "Interrupt Group 4" },
443 { MSR1(5), "Interrupt Group 5" },
444 { MSR1(6), "Interrupt Group 6" },
445 { MSR1(7), "Interrupt Group 7" },
446 { MSR1(8), "Interrupt Group 8" },
447 { MSR1(9), "Interrupt Group 9" },
448 { MSR1(10), "Interrupt Group 10" },
449 { MSR1(11), "Interrupt Group 11" },
450 { MSR1(12), "Interrupt Group 12" },
451 { MSR1(13), "Interrupt Group 13" },
452 { MSR1(14), "Interrupt Group 14" },
453 { MSR1(15), "Interrupt Group 15" },
454 { BITVAL_EOT }
455 }},
456 { 11, 4, "MAP_Y10", "Map Unrestricted Y Input 10", PRESENT_BIN, {
457 { MSR1(0), "Disable" },
458 { MSR1(1), "Interrupt Group 1" },
459 { MSR1(2), "Interrupt Group 2" },
460 { MSR1(3), "Interrupt Group 3" },
461 { MSR1(4), "Interrupt Group 4" },
462 { MSR1(5), "Interrupt Group 5" },
463 { MSR1(6), "Interrupt Group 6" },
464 { MSR1(7), "Interrupt Group 7" },
465 { MSR1(8), "Interrupt Group 8" },
466 { MSR1(9), "Interrupt Group 9" },
467 { MSR1(10), "Interrupt Group 10" },
468 { MSR1(11), "Interrupt Group 11" },
469 { MSR1(12), "Interrupt Group 12" },
470 { MSR1(13), "Interrupt Group 13" },
471 { MSR1(14), "Interrupt Group 14" },
472 { MSR1(15), "Interrupt Group 15" },
473 { BITVAL_EOT }
474 }},
475 { 7, 4, "MAP_Y9", "Map Unrestricted Y Input 9", PRESENT_BIN, {
476 { MSR1(0), "Disable" },
477 { MSR1(1), "Interrupt Group 1" },
478 { MSR1(2), "Interrupt Group 2" },
479 { MSR1(3), "Interrupt Group 3" },
480 { MSR1(4), "Interrupt Group 4" },
481 { MSR1(5), "Interrupt Group 5" },
482 { MSR1(6), "Interrupt Group 6" },
483 { MSR1(7), "Interrupt Group 7" },
484 { MSR1(8), "Interrupt Group 8" },
485 { MSR1(9), "Interrupt Group 9" },
486 { MSR1(10), "Interrupt Group 10" },
487 { MSR1(11), "Interrupt Group 11" },
488 { MSR1(12), "Interrupt Group 12" },
489 { MSR1(13), "Interrupt Group 13" },
490 { MSR1(14), "Interrupt Group 14" },
491 { MSR1(15), "Interrupt Group 15" },
492 { BITVAL_EOT }
493 }},
494 { 3, 4, "MAP_Y8", "Map Unrestricted Y Input 8", PRESENT_BIN, {
495 { MSR1(0), "Disable" },
496 { MSR1(1), "Interrupt Group 1" },
497 { MSR1(2), "Interrupt Group 2" },
498 { MSR1(3), "Interrupt Group 3" },
499 { MSR1(4), "Interrupt Group 4" },
500 { MSR1(5), "Interrupt Group 5" },
501 { MSR1(6), "Interrupt Group 6" },
502 { MSR1(7), "Interrupt Group 7" },
503 { MSR1(8), "Interrupt Group 8" },
504 { MSR1(9), "Interrupt Group 9" },
505 { MSR1(10), "Interrupt Group 10" },
506 { MSR1(11), "Interrupt Group 11" },
507 { MSR1(12), "Interrupt Group 12" },
508 { MSR1(13), "Interrupt Group 13" },
509 { MSR1(14), "Interrupt Group 14" },
510 { MSR1(15), "Interrupt Group 15" },
511 { BITVAL_EOT }
512 }},
513 { BITS_EOT }
514 }},
515 { 0x51400022, MSRTYPE_RDWR, MSR2(0, 0), "PIC_ZSEL_LOW", "IRQ Mapper Unrestricted Z Select Low", {
516 { 63, 32, RESERVED },
517 { 31, 4, "MAP_Z7", "Map Unrestricted Z Input 7", PRESENT_BIN, {
518 { MSR1(0), "Disable" },
519 { MSR1(1), "Interrupt Group 1" },
520 { MSR1(2), "Interrupt Group 2" },
521 { MSR1(3), "Interrupt Group 3" },
522 { MSR1(4), "Interrupt Group 4" },
523 { MSR1(5), "Interrupt Group 5" },
524 { MSR1(6), "Interrupt Group 6" },
525 { MSR1(7), "Interrupt Group 7" },
526 { MSR1(8), "Interrupt Group 8" },
527 { MSR1(9), "Interrupt Group 9" },
528 { MSR1(10), "Interrupt Group 10" },
529 { MSR1(11), "Interrupt Group 11" },
530 { MSR1(12), "Interrupt Group 12" },
531 { MSR1(13), "Interrupt Group 13" },
532 { MSR1(14), "Interrupt Group 14" },
533 { MSR1(15), "Interrupt Group 15" },
534 { BITVAL_EOT }
535 }},
536 { 27, 4, "MAP_Z6", "Map Unrestricted Z Input 6", PRESENT_BIN, {
537 { MSR1(0), "Disable" },
538 { MSR1(1), "Interrupt Group 1" },
539 { MSR1(2), "Interrupt Group 2" },
540 { MSR1(3), "Interrupt Group 3" },
541 { MSR1(4), "Interrupt Group 4" },
542 { MSR1(5), "Interrupt Group 5" },
543 { MSR1(6), "Interrupt Group 6" },
544 { MSR1(7), "Interrupt Group 7" },
545 { MSR1(8), "Interrupt Group 8" },
546 { MSR1(9), "Interrupt Group 9" },
547 { MSR1(10), "Interrupt Group 10" },
548 { MSR1(11), "Interrupt Group 11" },
549 { MSR1(12), "Interrupt Group 12" },
550 { MSR1(13), "Interrupt Group 13" },
551 { MSR1(14), "Interrupt Group 14" },
552 { MSR1(15), "Interrupt Group 15" },
553 { BITVAL_EOT }
554 }},
555 { 23, 4, "MAP_Z5", "Map Unrestricted Z Input 5", PRESENT_BIN, {
556 { MSR1(0), "Disable" },
557 { MSR1(1), "Interrupt Group 1" },
558 { MSR1(2), "Interrupt Group 2" },
559 { MSR1(3), "Interrupt Group 3" },
560 { MSR1(4), "Interrupt Group 4" },
561 { MSR1(5), "Interrupt Group 5" },
562 { MSR1(6), "Interrupt Group 6" },
563 { MSR1(7), "Interrupt Group 7" },
564 { MSR1(8), "Interrupt Group 8" },
565 { MSR1(9), "Interrupt Group 9" },
566 { MSR1(10), "Interrupt Group 10" },
567 { MSR1(11), "Interrupt Group 11" },
568 { MSR1(12), "Interrupt Group 12" },
569 { MSR1(13), "Interrupt Group 13" },
570 { MSR1(14), "Interrupt Group 14" },
571 { MSR1(15), "Interrupt Group 15" },
572 { BITVAL_EOT }
573 }},
574 { 19, 4, "MAP_Z4", "Map Unrestricted Z Input 4", PRESENT_BIN, {
575 { MSR1(0), "Disable" },
576 { MSR1(1), "Interrupt Group 1" },
577 { MSR1(2), "Interrupt Group 2" },
578 { MSR1(3), "Interrupt Group 3" },
579 { MSR1(4), "Interrupt Group 4" },
580 { MSR1(5), "Interrupt Group 5" },
581 { MSR1(6), "Interrupt Group 6" },
582 { MSR1(7), "Interrupt Group 7" },
583 { MSR1(8), "Interrupt Group 8" },
584 { MSR1(9), "Interrupt Group 9" },
585 { MSR1(10), "Interrupt Group 10" },
586 { MSR1(11), "Interrupt Group 11" },
587 { MSR1(12), "Interrupt Group 12" },
588 { MSR1(13), "Interrupt Group 13" },
589 { MSR1(14), "Interrupt Group 14" },
590 { MSR1(15), "Interrupt Group 15" },
591 { BITVAL_EOT }
592 }},
593 { 15, 4, "MAP_Z3", "Map Unrestricted Z Input 3", PRESENT_BIN, {
594 { MSR1(0), "Disable" },
595 { MSR1(1), "Interrupt Group 1" },
596 { MSR1(2), "Interrupt Group 2" },
597 { MSR1(3), "Interrupt Group 3" },
598 { MSR1(4), "Interrupt Group 4" },
599 { MSR1(5), "Interrupt Group 5" },
600 { MSR1(6), "Interrupt Group 6" },
601 { MSR1(7), "Interrupt Group 7" },
602 { MSR1(8), "Interrupt Group 8" },
603 { MSR1(9), "Interrupt Group 9" },
604 { MSR1(10), "Interrupt Group 10" },
605 { MSR1(11), "Interrupt Group 11" },
606 { MSR1(12), "Interrupt Group 12" },
607 { MSR1(13), "Interrupt Group 13" },
608 { MSR1(14), "Interrupt Group 14" },
609 { MSR1(15), "Interrupt Group 15" },
610 { BITVAL_EOT }
611 }},
612 { 11, 4, "MAP_Z2", "Map Unrestricted Z Input 2", PRESENT_BIN, {
613 { MSR1(0), "Disable" },
614 { MSR1(1), "Interrupt Group 1" },
615 { MSR1(2), "Interrupt Group 2" },
616 { MSR1(3), "Interrupt Group 3" },
617 { MSR1(4), "Interrupt Group 4" },
618 { MSR1(5), "Interrupt Group 5" },
619 { MSR1(6), "Interrupt Group 6" },
620 { MSR1(7), "Interrupt Group 7" },
621 { MSR1(8), "Interrupt Group 8" },
622 { MSR1(9), "Interrupt Group 9" },
623 { MSR1(10), "Interrupt Group 10" },
624 { MSR1(11), "Interrupt Group 11" },
625 { MSR1(12), "Interrupt Group 12" },
626 { MSR1(13), "Interrupt Group 13" },
627 { MSR1(14), "Interrupt Group 14" },
628 { MSR1(15), "Interrupt Group 15" },
629 { BITVAL_EOT }
630 }},
631 { 7, 4, "MAP_Z1", "Map Unrestricted Z Input 1", PRESENT_BIN, {
632 { MSR1(0), "Disable" },
633 { MSR1(1), "Interrupt Group 1" },
634 { MSR1(2), "Interrupt Group 2" },
635 { MSR1(3), "Interrupt Group 3" },
636 { MSR1(4), "Interrupt Group 4" },
637 { MSR1(5), "Interrupt Group 5" },
638 { MSR1(6), "Interrupt Group 6" },
639 { MSR1(7), "Interrupt Group 7" },
640 { MSR1(8), "Interrupt Group 8" },
641 { MSR1(9), "Interrupt Group 9" },
642 { MSR1(10), "Interrupt Group 10" },
643 { MSR1(11), "Interrupt Group 11" },
644 { MSR1(12), "Interrupt Group 12" },
645 { MSR1(13), "Interrupt Group 13" },
646 { MSR1(14), "Interrupt Group 14" },
647 { MSR1(15), "Interrupt Group 15" },
648 { BITVAL_EOT }
649 }},
650 { 3, 4, "MAP_Z0", "Map Unrestricted Z Input 0", PRESENT_BIN, {
651 { MSR1(0), "Disable" },
652 { MSR1(1), "Interrupt Group 1" },
653 { MSR1(2), "Interrupt Group 2" },
654 { MSR1(3), "Interrupt Group 3" },
655 { MSR1(4), "Interrupt Group 4" },
656 { MSR1(5), "Interrupt Group 5" },
657 { MSR1(6), "Interrupt Group 6" },
658 { MSR1(7), "Interrupt Group 7" },
659 { MSR1(8), "Interrupt Group 8" },
660 { MSR1(9), "Interrupt Group 9" },
661 { MSR1(10), "Interrupt Group 10" },
662 { MSR1(11), "Interrupt Group 11" },
663 { MSR1(12), "Interrupt Group 12" },
664 { MSR1(13), "Interrupt Group 13" },
665 { MSR1(14), "Interrupt Group 14" },
666 { MSR1(15), "Interrupt Group 15" },
667 { BITVAL_EOT }
668 }},
669 { BITS_EOT }
670 }},
671 { 0x51400023, MSRTYPE_RDWR, MSR2(0, 0), "PIC_ZSEL_HIGH", "IRQ Mapper Unrestricted Z Select High", {
672 { 63, 32, RESERVED },
673 { 31, 4, "MAP_Z15", "Map Unrestricted Z Input 15", PRESENT_BIN, {
674 { MSR1(0), "Disable" },
675 { MSR1(1), "Interrupt Group 1" },
676 { MSR1(2), "Interrupt Group 2" },
677 { MSR1(3), "Interrupt Group 3" },
678 { MSR1(4), "Interrupt Group 4" },
679 { MSR1(5), "Interrupt Group 5" },
680 { MSR1(6), "Interrupt Group 6" },
681 { MSR1(7), "Interrupt Group 7" },
682 { MSR1(8), "Interrupt Group 8" },
683 { MSR1(9), "Interrupt Group 9" },
684 { MSR1(10), "Interrupt Group 10" },
685 { MSR1(11), "Interrupt Group 11" },
686 { MSR1(12), "Interrupt Group 12" },
687 { MSR1(13), "Interrupt Group 13" },
688 { MSR1(14), "Interrupt Group 14" },
689 { MSR1(15), "Interrupt Group 15" },
690 { BITVAL_EOT }
691 }},
692 { 27, 4, "MAP_Z14", "Map Unrestricted Z Input 14", PRESENT_BIN, {
693 { MSR1(0), "Disable" },
694 { MSR1(1), "Interrupt Group 1" },
695 { MSR1(2), "Interrupt Group 2" },
696 { MSR1(3), "Interrupt Group 3" },
697 { MSR1(4), "Interrupt Group 4" },
698 { MSR1(5), "Interrupt Group 5" },
699 { MSR1(6), "Interrupt Group 6" },
700 { MSR1(7), "Interrupt Group 7" },
701 { MSR1(8), "Interrupt Group 8" },
702 { MSR1(9), "Interrupt Group 9" },
703 { MSR1(10), "Interrupt Group 10" },
704 { MSR1(11), "Interrupt Group 11" },
705 { MSR1(12), "Interrupt Group 12" },
706 { MSR1(13), "Interrupt Group 13" },
707 { MSR1(14), "Interrupt Group 14" },
708 { MSR1(15), "Interrupt Group 15" },
709 { BITVAL_EOT }
710 }},
711 { 23, 4, "MAP_Z13", "Map Unrestricted Z Input 13", PRESENT_BIN, {
712 { MSR1(0), "Disable" },
713 { MSR1(1), "Interrupt Group 1" },
714 { MSR1(2), "Interrupt Group 2" },
715 { MSR1(3), "Interrupt Group 3" },
716 { MSR1(4), "Interrupt Group 4" },
717 { MSR1(5), "Interrupt Group 5" },
718 { MSR1(6), "Interrupt Group 6" },
719 { MSR1(7), "Interrupt Group 7" },
720 { MSR1(8), "Interrupt Group 8" },
721 { MSR1(9), "Interrupt Group 9" },
722 { MSR1(10), "Interrupt Group 10" },
723 { MSR1(11), "Interrupt Group 11" },
724 { MSR1(12), "Interrupt Group 12" },
725 { MSR1(13), "Interrupt Group 13" },
726 { MSR1(14), "Interrupt Group 14" },
727 { MSR1(15), "Interrupt Group 15" },
728 { BITVAL_EOT }
729 }},
730 { 19, 4, "MAP_Z12", "Map Unrestricted Z Input 12", PRESENT_BIN, {
731 { MSR1(0), "Disable" },
732 { MSR1(1), "Interrupt Group 1" },
733 { MSR1(2), "Interrupt Group 2" },
734 { MSR1(3), "Interrupt Group 3" },
735 { MSR1(4), "Interrupt Group 4" },
736 { MSR1(5), "Interrupt Group 5" },
737 { MSR1(6), "Interrupt Group 6" },
738 { MSR1(7), "Interrupt Group 7" },
739 { MSR1(8), "Interrupt Group 8" },
740 { MSR1(9), "Interrupt Group 9" },
741 { MSR1(10), "Interrupt Group 10" },
742 { MSR1(11), "Interrupt Group 11" },
743 { MSR1(12), "Interrupt Group 12" },
744 { MSR1(13), "Interrupt Group 13" },
745 { MSR1(14), "Interrupt Group 14" },
746 { MSR1(15), "Interrupt Group 15" },
747 { BITVAL_EOT }
748 }},
749 { 15, 4, "MAP_Z11", "Map Unrestricted Z Input 11", PRESENT_BIN, {
750 { MSR1(0), "Disable" },
751 { MSR1(1), "Interrupt Group 1" },
752 { MSR1(2), "Interrupt Group 2" },
753 { MSR1(3), "Interrupt Group 3" },
754 { MSR1(4), "Interrupt Group 4" },
755 { MSR1(5), "Interrupt Group 5" },
756 { MSR1(6), "Interrupt Group 6" },
757 { MSR1(7), "Interrupt Group 7" },
758 { MSR1(8), "Interrupt Group 8" },
759 { MSR1(9), "Interrupt Group 9" },
760 { MSR1(10), "Interrupt Group 10" },
761 { MSR1(11), "Interrupt Group 11" },
762 { MSR1(12), "Interrupt Group 12" },
763 { MSR1(13), "Interrupt Group 13" },
764 { MSR1(14), "Interrupt Group 14" },
765 { MSR1(15), "Interrupt Group 15" },
766 { BITVAL_EOT }
767 }},
768 { 11, 4, "MAP_Z10", "Map Unrestricted Z Input 10", PRESENT_BIN, {
769 { MSR1(0), "Disable" },
770 { MSR1(1), "Interrupt Group 1" },
771 { MSR1(2), "Interrupt Group 2" },
772 { MSR1(3), "Interrupt Group 3" },
773 { MSR1(4), "Interrupt Group 4" },
774 { MSR1(5), "Interrupt Group 5" },
775 { MSR1(6), "Interrupt Group 6" },
776 { MSR1(7), "Interrupt Group 7" },
777 { MSR1(8), "Interrupt Group 8" },
778 { MSR1(9), "Interrupt Group 9" },
779 { MSR1(10), "Interrupt Group 10" },
780 { MSR1(11), "Interrupt Group 11" },
781 { MSR1(12), "Interrupt Group 12" },
782 { MSR1(13), "Interrupt Group 13" },
783 { MSR1(14), "Interrupt Group 14" },
784 { MSR1(15), "Interrupt Group 15" },
785 { BITVAL_EOT }
786 }},
787 { 7, 4, "MAP_Z9", "Map Unrestricted Z Input 9", PRESENT_BIN, {
788 { MSR1(0), "Disable" },
789 { MSR1(1), "Interrupt Group 1" },
790 { MSR1(2), "Interrupt Group 2" },
791 { MSR1(3), "Interrupt Group 3" },
792 { MSR1(4), "Interrupt Group 4" },
793 { MSR1(5), "Interrupt Group 5" },
794 { MSR1(6), "Interrupt Group 6" },
795 { MSR1(7), "Interrupt Group 7" },
796 { MSR1(8), "Interrupt Group 8" },
797 { MSR1(9), "Interrupt Group 9" },
798 { MSR1(10), "Interrupt Group 10" },
799 { MSR1(11), "Interrupt Group 11" },
800 { MSR1(12), "Interrupt Group 12" },
801 { MSR1(13), "Interrupt Group 13" },
802 { MSR1(14), "Interrupt Group 14" },
803 { MSR1(15), "Interrupt Group 15" },
804 { BITVAL_EOT }
805 }},
806 { 3, 4, "MAP_Z8", "Map Unrestricted Z Input 8", PRESENT_BIN, {
807 { MSR1(0), "Disable" },
808 { MSR1(1), "Interrupt Group 1" },
809 { MSR1(2), "Interrupt Group 2" },
810 { MSR1(3), "Interrupt Group 3" },
811 { MSR1(4), "Interrupt Group 4" },
812 { MSR1(5), "Interrupt Group 5" },
813 { MSR1(6), "Interrupt Group 6" },
814 { MSR1(7), "Interrupt Group 7" },
815 { MSR1(8), "Interrupt Group 8" },
816 { MSR1(9), "Interrupt Group 9" },
817 { MSR1(10), "Interrupt Group 10" },
818 { MSR1(11), "Interrupt Group 11" },
819 { MSR1(12), "Interrupt Group 12" },
820 { MSR1(13), "Interrupt Group 13" },
821 { MSR1(14), "Interrupt Group 14" },
822 { MSR1(15), "Interrupt Group 15" },
823 { BITVAL_EOT }
824 }},
825 { BITS_EOT }
826 }},
827 { 0x51400024, MSRTYPE_RDWR, MSR2(0, 0xffff), "PIC_IRQM_PRIM", "IRQ Mapper Primary Mask", {
828 { 63, 48, RESERVED },
829 { 15, 1, "PRIM15_MSK", "Primary Input 15 Mask", PRESENT_DEC, {
830 { MSR1(0), "Mask the interrupt source" },
831 { MSR1(1), "Do not mask the interrupt source" },
832 { BITVAL_EOT }
833 }},
834 { 14, 1, "PRIM14_MSK", "Primary Input 14 Mask", PRESENT_DEC, {
835 { MSR1(0), "Mask the interrupt source" },
836 { MSR1(1), "Do not mask the interrupt source" },
837 { BITVAL_EOT }
838 }},
839 { 13, 1, "PRIM13_MSK", "Primary Input 13 Mask", PRESENT_DEC, {
840 { MSR1(0), "Mask the interrupt source" },
841 { MSR1(1), "Do not mask the interrupt source" },
842 { BITVAL_EOT }
843 }},
844 { 12, 1, "PRIM12_MSK", "Primary Input 12 Mask", PRESENT_DEC, {
845 { MSR1(0), "Mask the interrupt source" },
846 { MSR1(1), "Do not mask the interrupt source" },
847 { BITVAL_EOT }
848 }},
849 { 11, 1, "PRIM11_MSK", "Primary Input 11 Mask", PRESENT_DEC, {
850 { MSR1(0), "Mask the interrupt source" },
851 { MSR1(1), "Do not mask the interrupt source" },
852 { BITVAL_EOT }
853 }},
854 { 10, 1, "PRIM10_MSK", "Primary Input 10 Mask", PRESENT_DEC, {
855 { MSR1(0), "Mask the interrupt source" },
856 { MSR1(1), "Do not mask the interrupt source" },
857 { BITVAL_EOT }
858 }},
859 { 9, 1, "PRIM9_MSK", "Primary Input 9 Mask", PRESENT_DEC, {
860 { MSR1(0), "Mask the interrupt source" },
861 { MSR1(1), "Do not mask the interrupt source" },
862 { BITVAL_EOT }
863 }},
864 { 8, 1, "PRIM8_MSK", "Primary Input 8 Mask", PRESENT_DEC, {
865 { MSR1(0), "Mask the interrupt source" },
866 { MSR1(1), "Do not mask the interrupt source" },
867 { BITVAL_EOT }
868 }},
869 { 7, 1, "PRIM7_MSK", "Primary Input 7 Mask", PRESENT_DEC, {
870 { MSR1(0), "Mask the interrupt source" },
871 { MSR1(1), "Do not mask the interrupt source" },
872 { BITVAL_EOT }
873 }},
874 { 6, 1, "PRIM6_MSK", "Primary Input 6 Mask", PRESENT_DEC, {
875 { MSR1(0), "Mask the interrupt source" },
876 { MSR1(1), "Do not mask the interrupt source" },
877 { BITVAL_EOT }
878 }},
879 { 5, 1, "PRIM5_MSK", "Primary Input 5 Mask", PRESENT_DEC, {
880 { MSR1(0), "Mask the interrupt source" },
881 { MSR1(1), "Do not mask the interrupt source" },
882 { BITVAL_EOT }
883 }},
884 { 4, 1, "PRIM4_MSK", "Primary Input 4 Mask", PRESENT_DEC, {
885 { MSR1(0), "Mask the interrupt source" },
886 { MSR1(1), "Do not mask the interrupt source" },
887 { BITVAL_EOT }
888 }},
889 { 3, 1, "PRIM3_MSK", "Primary Input 3 Mask", PRESENT_DEC, {
890 { MSR1(0), "Mask the interrupt source" },
891 { MSR1(1), "Do not mask the interrupt source" },
892 { BITVAL_EOT }
893 }},
894 { 2, 1, RESERVED },
895 { 1, 1, "PRIM1_MSK", "Primary Input 1 Mask", PRESENT_DEC, {
896 { MSR1(0), "Mask the interrupt source" },
897 { MSR1(1), "Do not mask the interrupt source" },
898 { BITVAL_EOT }
899 }},
900 { 0, 1, "PRIM0_MSK", "Primary Input 0 Mask", PRESENT_DEC, {
901 { MSR1(0), "Mask the interrupt source" },
902 { MSR1(1), "Do not mask the interrupt source" },
903 { BITVAL_EOT }
904 }},
905 { BITS_EOT }
906 }},
907 { 0x51400025, MSRTYPE_RDWR, MSR2(0, 0), "PIC_IRQM_LPC", "IRQ Mapper LPC Mask", {
908 { 63, 48, RESERVED },
909 { 15, 1, "LPC15_EN", "LPC Input 15 Enable", PRESENT_DEC, {
910 { MSR1(0), "Disable interrupt source" },
911 { MSR1(1), "Enable interrupt source" },
912 { BITVAL_EOT }
913 }},
914 { 14, 1, "LPC14_EN", "LPC Input 14 Enable", PRESENT_DEC, {
915 { MSR1(0), "Disable interrupt source" },
916 { MSR1(1), "Enable interrupt source" },
917 { BITVAL_EOT }
918 }},
919 { 13, 1, "LPC13_EN", "LPC Input 13 Enable", PRESENT_DEC, {
920 { MSR1(0), "Disable interrupt source" },
921 { MSR1(1), "Enable interrupt source" },
922 { BITVAL_EOT }
923 }},
924 { 12, 1, "LPC12_EN", "LPC Input 12 Enable", PRESENT_DEC, {
925 { MSR1(0), "Disable interrupt source" },
926 { MSR1(1), "Enable interrupt source" },
927 { BITVAL_EOT }
928 }},
929 { 11, 1, "LPC11_EN", "LPC Input 11 Enable", PRESENT_DEC, {
930 { MSR1(0), "Disable interrupt source" },
931 { MSR1(1), "Enable interrupt source" },
932 { BITVAL_EOT }
933 }},
934 { 10, 1, "LPC10_EN", "LPC Input 10 Enable", PRESENT_DEC, {
935 { MSR1(0), "Disable interrupt source" },
936 { MSR1(1), "Enable interrupt source" },
937 { BITVAL_EOT }
938 }},
939 { 9, 1, "LPC9_EN", "LPC Input 9 Enable", PRESENT_DEC, {
940 { MSR1(0), "Disable interrupt source" },
941 { MSR1(1), "Enable interrupt source" },
942 { BITVAL_EOT }
943 }},
944 { 8, 1, "LPC8_EN", "LPC Input 8 Enable", PRESENT_DEC, {
945 { MSR1(0), "Disable interrupt source" },
946 { MSR1(1), "Enable interrupt source" },
947 { BITVAL_EOT }
948 }},
949 { 7, 1, "LPC7_EN", "LPC Input 7 Enable", PRESENT_DEC, {
950 { MSR1(0), "Disable interrupt source" },
951 { MSR1(1), "Enable interrupt source" },
952 { BITVAL_EOT }
953 }},
954 { 6, 1, "LPC6_EN", "LPC Input 6 Enable", PRESENT_DEC, {
955 { MSR1(0), "Disable interrupt source" },
956 { MSR1(1), "Enable interrupt source" },
957 { BITVAL_EOT }
958 }},
959 { 5, 1, "LPC5_EN", "LPC Input 5 Enable", PRESENT_DEC, {
960 { MSR1(0), "Disable interrupt source" },
961 { MSR1(1), "Enable interrupt source" },
962 { BITVAL_EOT }
963 }},
964 { 4, 1, "LPC4_EN", "LPC Input 4 Enable", PRESENT_DEC, {
965 { MSR1(0), "Disable interrupt source" },
966 { MSR1(1), "Enable interrupt source" },
967 { BITVAL_EOT }
968 }},
969 { 3, 1, "LPC3_EN", "LPC Input 3 Enable", PRESENT_DEC, {
970 { MSR1(0), "Disable interrupt source" },
971 { MSR1(1), "Enable interrupt source" },
972 { BITVAL_EOT }
973 }},
974 { 2, 1, RESERVED },
975 { 1, 1, "LPC1_EN", "LPC Input 1 Enable", PRESENT_DEC, {
976 { MSR1(0), "Disable interrupt source" },
977 { MSR1(1), "Enable interrupt source" },
978 { BITVAL_EOT }
979 }},
980 { 0, 1, "LPC0_EN", "LPC Input 0 Enable", PRESENT_DEC, {
981 { MSR1(0), "Disable interrupt source" },
982 { MSR1(1), "Enable interrupt source" },
983 { BITVAL_EOT }
984 }},
985 { BITS_EOT }
986 }},
987 { 0x51400026, MSRTYPE_RDONLY, MSR2(0, 0), "PIC_XIRR_STS_LOW", "IRQ Mapper Extended Interrupt Request Status Low", {
988 { 63, 32, RESERVED },
989 { 31, 1, "IG7_STS_Z", "Unrestricted Source Z Input 7", PRESENT_BIN, {
990 { MSR1(0), "No interrupt" },
991 { MSR1(1), "INTERRUPT" },
992 { BITVAL_EOT }
993 }},
994 { 30, 1, "IG7_STS_Y", "Unrestricted Source Y Input 7", PRESENT_BIN, {
995 { MSR1(0), "No interrupt" },
996 { MSR1(1), "INTERRUPT" },
997 { BITVAL_EOT }
998 }},
999 { 29, 1, "IG7_STS_LPC", "LPC Input 7", PRESENT_BIN, {
1000 { MSR1(0), "No interrupt" },
1001 { MSR1(1), "INTERRUPT" },
1002 { BITVAL_EOT }
1003 }},
1004 { 28, 1, "IG7_STS_PRIM", "Primary Input 7", PRESENT_BIN, {
1005 { MSR1(0), "No interrupt" },
1006 { MSR1(1), "INTERRUPT" },
1007 { BITVAL_EOT }
1008 }},
1009 { 27, 1, "IG6_STS_Z", "Unrestricted Source Z Input 6", PRESENT_BIN, {
1010 { MSR1(0), "No interrupt" },
1011 { MSR1(1), "INTERRUPT" },
1012 { BITVAL_EOT }
1013 }},
1014 { 26, 1, "IG6_STS_Y", "Unrestricted Source Y Input 6", PRESENT_BIN, {
1015 { MSR1(0), "No interrupt" },
1016 { MSR1(1), "INTERRUPT" },
1017 { BITVAL_EOT }
1018 }},
1019 { 25, 1, "IG6_STS_LPC", "LPC Input 6", PRESENT_BIN, {
1020 { MSR1(0), "No interrupt" },
1021 { MSR1(1), "INTERRUPT" },
1022 { BITVAL_EOT }
1023 }},
1024 { 24, 1, "IG6_STS_PRIM", "Primary Input 6", PRESENT_BIN, {
1025 { MSR1(0), "No interrupt" },
1026 { MSR1(1), "INTERRUPT" },
1027 { BITVAL_EOT }
1028 }},
1029 { 23, 1, "IG5_STS_Z", "Unrestricted Source Z Input 5", PRESENT_BIN, {
1030 { MSR1(0), "No interrupt" },
1031 { MSR1(1), "INTERRUPT" },
1032 { BITVAL_EOT }
1033 }},
1034 { 22, 1, "IG5_STS_Y", "Unrestricted Source Y Input 5", PRESENT_BIN, {
1035 { MSR1(0), "No interrupt" },
1036 { MSR1(1), "INTERRUPT" },
1037 { BITVAL_EOT }
1038 }},
1039 { 21, 1, "IG5_STS_LPC", "LPC Input 5", PRESENT_BIN, {
1040 { MSR1(0), "No interrupt" },
1041 { MSR1(1), "INTERRUPT" },
1042 { BITVAL_EOT }
1043 }},
1044 { 20, 1, "IG5_STS_PRIM", "Primary Input 5", PRESENT_BIN, {
1045 { MSR1(0), "No interrupt" },
1046 { MSR1(1), "INTERRUPT" },
1047 { BITVAL_EOT }
1048 }},
1049 { 19, 1, "IG4_STS_Z", "Unrestricted Source Z Input 4", PRESENT_BIN, {
1050 { MSR1(0), "No interrupt" },
1051 { MSR1(1), "INTERRUPT" },
1052 { BITVAL_EOT }
1053 }},
1054 { 18, 1, "IG4_STS_Y", "Unrestricted Source Y Input 4", PRESENT_BIN, {
1055 { MSR1(0), "No interrupt" },
1056 { MSR1(1), "INTERRUPT" },
1057 { BITVAL_EOT }
1058 }},
1059 { 17, 1, "IG4_STS_LPC", "LPC Input 4", PRESENT_BIN, {
1060 { MSR1(0), "No interrupt" },
1061 { MSR1(1), "INTERRUPT" },
1062 { BITVAL_EOT }
1063 }},
1064 { 16, 1, "IG4_STS_PRIM", "Primary Input 4", PRESENT_BIN, {
1065 { MSR1(0), "No interrupt" },
1066 { MSR1(1), "INTERRUPT" },
1067 { BITVAL_EOT }
1068 }},
1069 { 15, 1, "IG3_STS_Z", "Unrestricted Source Z Input 3", PRESENT_BIN, {
1070 { MSR1(0), "No interrupt" },
1071 { MSR1(1), "INTERRUPT" },
1072 { BITVAL_EOT }
1073 }},
1074 { 14, 1, "IG3_STS_Y", "Unrestricted Source Y Input 3", PRESENT_BIN, {
1075 { MSR1(0), "No interrupt" },
1076 { MSR1(1), "INTERRUPT" },
1077 { BITVAL_EOT }
1078 }},
1079 { 13, 1, "IG3_STS_LPC", "LPC Input 3", PRESENT_BIN, {
1080 { MSR1(0), "No interrupt" },
1081 { MSR1(1), "INTERRUPT" },
1082 { BITVAL_EOT }
1083 }},
1084 { 12, 1, "IG3_STS_PRIM", "Primary Input 3", PRESENT_BIN, {
1085 { MSR1(0), "No interrupt" },
1086 { MSR1(1), "INTERRUPT" },
1087 { BITVAL_EOT }
1088 }},
1089 { 11, 1, "IG2_STS_Z", "Unrestricted Source Z Input 2", PRESENT_BIN, {
1090 { MSR1(0), "No interrupt" },
1091 { MSR1(1), "INTERRUPT" },
1092 { BITVAL_EOT }
1093 }},
1094 { 10, 1, "IG2_STS_Y", "Unrestricted Source Y Input 2", PRESENT_BIN, {
1095 { MSR1(0), "No interrupt" },
1096 { MSR1(1), "INTERRUPT" },
1097 { BITVAL_EOT }
1098 }},
1099 { 9, 2, RESERVED },
1100 { 7, 1, "IG1_STS_Z", "Unrestricted Source Z Input 1", PRESENT_BIN, {
1101 { MSR1(0), "No interrupt" },
1102 { MSR1(1), "INTERRUPT" },
1103 { BITVAL_EOT }
1104 }},
1105 { 6, 1, "IG1_STS_Y", "Unrestricted Source Y Input 1", PRESENT_BIN, {
1106 { MSR1(0), "No interrupt" },
1107 { MSR1(1), "INTERRUPT" },
1108 { BITVAL_EOT }
1109 }},
1110 { 5, 1, "IG1_STS_LPC", "LPC Input 1", PRESENT_BIN, {
1111 { MSR1(0), "No interrupt" },
1112 { MSR1(1), "INTERRUPT" },
1113 { BITVAL_EOT }
1114 }},
1115 { 4, 1, "IG1_STS_PRIM", "Primary Input 1", PRESENT_BIN, {
1116 { MSR1(0), "No interrupt" },
1117 { MSR1(1), "INTERRUPT" },
1118 { BITVAL_EOT }
1119 }},
1120 { 3, 2, RESERVED },
1121 { 1, 1, "IG0_STS_LPC", "LPC Input 0", PRESENT_BIN, {
1122 { MSR1(0), "No interrupt" },
1123 { MSR1(1), "INTERRUPT" },
1124 { BITVAL_EOT }
1125 }},
1126 { 0, 1, "IG0_STS_PRIM", "Primary Input 0", PRESENT_BIN, {
1127 { MSR1(0), "No interrupt" },
1128 { MSR1(1), "INTERRUPT" },
1129 { BITVAL_EOT }
1130 }},
1131 { BITS_EOT }
1132 }},
1133 { 0x51400027, MSRTYPE_RDONLY, MSR2(0, 0), "PIC_XIRR_STS_HIGH", "IRQ Mapper Extended Interrupt Request Status High", {
1134 { 63, 32, RESERVED },
1135 { 31, 1, "IG15_STS_Z", "Unrestricted Source Z Input 15", PRESENT_BIN, {
1136 { MSR1(0), "No interrupt" },
1137 { MSR1(1), "INTERRUPT" },
1138 { BITVAL_EOT }
1139 }},
1140 { 30, 1, "IG15_STS_Y", "Unrestricted Source Y Input 15", PRESENT_BIN, {
1141 { MSR1(0), "No interrupt" },
1142 { MSR1(1), "INTERRUPT" },
1143 { BITVAL_EOT }
1144 }},
1145 { 29, 1, "IG15_STS_LPC", "LPC Input 15", PRESENT_BIN, {
1146 { MSR1(0), "No interrupt" },
1147 { MSR1(1), "INTERRUPT" },
1148 { BITVAL_EOT }
1149 }},
1150 { 28, 1, "IG15_STS_PRIM", "Primary Input 15", PRESENT_BIN, {
1151 { MSR1(0), "No interrupt" },
1152 { MSR1(1), "INTERRUPT" },
1153 { BITVAL_EOT }
1154 }},
1155 { 27, 1, "IG14_STS_Z", "Unrestricted Source Z Input 14", PRESENT_BIN, {
1156 { MSR1(0), "No interrupt" },
1157 { MSR1(1), "INTERRUPT" },
1158 { BITVAL_EOT }
1159 }},
1160 { 26, 1, "IG14_STS_Y", "Unrestricted Source Y Input 14", PRESENT_BIN, {
1161 { MSR1(0), "No interrupt" },
1162 { MSR1(1), "INTERRUPT" },
1163 { BITVAL_EOT }
1164 }},
1165 { 25, 1, "IG14_STS_LPC", "LPC Input 14", PRESENT_BIN, {
1166 { MSR1(0), "No interrupt" },
1167 { MSR1(1), "INTERRUPT" },
1168 { BITVAL_EOT }
1169 }},
1170 { 24, 1, "IG14_STS_PRIM", "Primary Input 14", PRESENT_BIN, {
1171 { MSR1(0), "No interrupt" },
1172 { MSR1(1), "INTERRUPT" },
1173 { BITVAL_EOT }
1174 }},
1175 { 23, 1, "IG13_STS_Z", "Unrestricted Source Z Input 13", PRESENT_BIN, {
1176 { MSR1(0), "No interrupt" },
1177 { MSR1(1), "INTERRUPT" },
1178 { BITVAL_EOT }
1179 }},
1180 { 22, 1, "IG13_STS_Y", "Unrestricted Source Y Input 13", PRESENT_BIN, {
1181 { MSR1(0), "No interrupt" },
1182 { MSR1(1), "INTERRUPT" },
1183 { BITVAL_EOT }
1184 }},
1185 { 21, 1, "IG13_STS_LPC", "LPC Input 13", PRESENT_BIN, {
1186 { MSR1(0), "No interrupt" },
1187 { MSR1(1), "INTERRUPT" },
1188 { BITVAL_EOT }
1189 }},
1190 { 20, 1, "IG13_STS_PRIM", "Primary Input 13", PRESENT_BIN, {
1191 { MSR1(0), "No interrupt" },
1192 { MSR1(1), "INTERRUPT" },
1193 { BITVAL_EOT }
1194 }},
1195 { 19, 1, "IG12_STS_Z", "Unrestricted Source Z Input 12", PRESENT_BIN, {
1196 { MSR1(0), "No interrupt" },
1197 { MSR1(1), "INTERRUPT" },
1198 { BITVAL_EOT }
1199 }},
1200 { 18, 1, "IG12_STS_Y", "Unrestricted Source Y Input 12", PRESENT_BIN, {
1201 { MSR1(0), "No interrupt" },
1202 { MSR1(1), "INTERRUPT" },
1203 { BITVAL_EOT }
1204 }},
1205 { 17, 1, "IG12_STS_LPC", "LPC Input 12", PRESENT_BIN, {
1206 { MSR1(0), "No interrupt" },
1207 { MSR1(1), "INTERRUPT" },
1208 { BITVAL_EOT }
1209 }},
1210 { 16, 1, "IG12_STS_PRIM", "Primary Input 12", PRESENT_BIN, {
1211 { MSR1(0), "No interrupt" },
1212 { MSR1(1), "INTERRUPT" },
1213 { BITVAL_EOT }
1214 }},
1215 { 15, 1, "IG11_STS_Z", "Unrestricted Source Z Input 11", PRESENT_BIN, {
1216 { MSR1(0), "No interrupt" },
1217 { MSR1(1), "INTERRUPT" },
1218 { BITVAL_EOT }
1219 }},
1220 { 14, 1, "IG11_STS_Y", "Unrestricted Source Y Input 11", PRESENT_BIN, {
1221 { MSR1(0), "No interrupt" },
1222 { MSR1(1), "INTERRUPT" },
1223 { BITVAL_EOT }
1224 }},
1225 { 13, 1, "IG11_STS_LPC", "LPC Input 11", PRESENT_BIN, {
1226 { MSR1(0), "No interrupt" },
1227 { MSR1(1), "INTERRUPT" },
1228 { BITVAL_EOT }
1229 }},
1230 { 12, 1, "IG11_STS_PRIM", "Primary Input 11", PRESENT_BIN, {
1231 { MSR1(0), "No interrupt" },
1232 { MSR1(1), "INTERRUPT" },
1233 { BITVAL_EOT }
1234 }},
1235 { 11, 1, "IG10_STS_Z", "Unrestricted Source Z Input 10", PRESENT_BIN, {
1236 { MSR1(0), "No interrupt" },
1237 { MSR1(1), "INTERRUPT" },
1238 { BITVAL_EOT }
1239 }},
1240 { 10, 1, "IG10_STS_Y", "Unrestricted Source Y Input 10", PRESENT_BIN, {
1241 { MSR1(0), "No interrupt" },
1242 { MSR1(1), "INTERRUPT" },
1243 { BITVAL_EOT }
1244 }},
1245 { 9, 1, "IG10_STS_LPC", "LPC Input 10", PRESENT_BIN, {
1246 { MSR1(0), "No interrupt" },
1247 { MSR1(1), "INTERRUPT" },
1248 { BITVAL_EOT }
1249 }},
1250 { 8, 1, "IG10_STS_PRIM", "Primary Input 10", PRESENT_BIN, {
1251 { MSR1(0), "No interrupt" },
1252 { MSR1(1), "INTERRUPT" },
1253 { BITVAL_EOT }
1254 }},
1255 { 7, 1, "IG9_STS_Z", "Unrestricted Source Z Input 9", PRESENT_BIN, {
1256 { MSR1(0), "No interrupt" },
1257 { MSR1(1), "INTERRUPT" },
1258 { BITVAL_EOT }
1259 }},
1260 { 6, 1, "IG9_STS_Y", "Unrestricted Source Y Input 9", PRESENT_BIN, {
1261 { MSR1(0), "No interrupt" },
1262 { MSR1(1), "INTERRUPT" },
1263 { BITVAL_EOT }
1264 }},
1265 { 5, 1, "IG9_STS_LPC", "LPC Input 9", PRESENT_BIN, {
1266 { MSR1(0), "No interrupt" },
1267 { MSR1(1), "INTERRUPT" },
1268 { BITVAL_EOT }
1269 }},
1270 { 4, 1, "IG9_STS_PRIM", "Primary Input 9", PRESENT_BIN, {
1271 { MSR1(0), "No interrupt" },
1272 { MSR1(1), "INTERRUPT" },
1273 { BITVAL_EOT }
1274 }},
1275 { 3, 1, "IG8_STS_Z", "Unrestricted Source Z Input 8", PRESENT_BIN, {
1276 { MSR1(0), "No interrupt" },
1277 { MSR1(1), "INTERRUPT" },
1278 { BITVAL_EOT }
1279 }},
1280 { 2, 1, "IG8_STS_Y", "Unrestricted Source Y Input 8", PRESENT_BIN, {
1281 { MSR1(0), "No interrupt" },
1282 { MSR1(1), "INTERRUPT" },
1283 { BITVAL_EOT }
1284 }},
1285 { 1, 1, "IG8_STS_LPC", "LPC Input 8", PRESENT_BIN, {
1286 { MSR1(0), "No interrupt" },
1287 { MSR1(1), "INTERRUPT" },
1288 { BITVAL_EOT }
1289 }},
1290 { 0, 1, "IG8_STS_PRIM", "Primary Input 8", PRESENT_BIN, {
1291 { MSR1(0), "No interrupt" },
1292 { MSR1(1), "INTERRUPT" },
1293 { BITVAL_EOT }
1294 }},
1295 { BITS_EOT }
1296 }},
1297 { 0x5140004e, MSRTYPE_RDWR, MSR2(0, 0), "LPC_SERIRQ", "LPC Serial IRQ Control", {
1298 { 31, 16, "INVERT", "IRQ[x] input is active low", PRESENT_HEX },
1299 { 15, 8, RESERVED },
1300 { 7, 1, "SIRQ_EN", "Serial IRQ Enable", PRESENT_BIN, {
1301 { MSR1(0), "Disable" },
1302 { MSR1(1), "Enable" },
1303 { BITVAL_EOT }
1304 }},
1305 { 6, 1, "SIRQ_MODE", "Serial IRQ Interface Mode", PRESENT_BIN, {
1306 { MSR1(0), "Continuous (Idle)" },
1307 { MSR1(1), "Quiet (Active)" },
1308 { BITVAL_EOT }
1309 }},
1310 { 5, 4, "IRQ_FRAME", "IRQ Data Frames", PRESENT_BIN, {
1311 { MSR1(0), "17" },
1312 { MSR1(1), "18" },
1313 { MSR1(2), "19" },
1314 { MSR1(3), "20" },
1315 { MSR1(4), "21" },
1316 { MSR1(5), "22" },
1317 { MSR1(6), "23" },
1318 { MSR1(7), "24" },
1319 { MSR1(8), "25" },
1320 { MSR1(9), "26" },
1321 { MSR1(10), "27" },
1322 { MSR1(11), "28" },
1323 { MSR1(12), "29" },
1324 { MSR1(13), "30" },
1325 { MSR1(14), "31" },
1326 { MSR1(15), "32" },
1327 { BITVAL_EOT }
1328 }},
1329 { 1, 2, "START_FPW", "Start Frame Pulse Width", PRESENT_BIN, {
1330 { MSR1(0), "4 clocks" },
1331 { MSR1(1), "6 clocks" },
1332 { MSR1(2), "8 clocks" },
1333 { MSR1(3), "Reserved" },
1334 { BITVAL_EOT }
1335 }},
1336 { BITS_EOT }
1337 }},
1338 { MSR_EOT }
1339 };
ast, secure and flexible OpenSource firmware