src/southbridge/ricoh/rl5c476/rl5c476.h

   1 /* This file is part of the coreboot project. */
   2 /* SPDX-License-Identifier: GPL-2.0-or-later */
   3
   4  /* rl5c476 routines and defines*/
   5
   6
   7 #include <stdint.h>
   8
   9
  10 /* the 16 bit control structure for ricoh cardbus bridge */
  11 typedef struct pc16reg  {
  12         u8 idrevs;
  13         u8 ifstat;
  14         u8 pwctrl;
  15         u8 igctrl;
  16         u8 cschg;
  17         u8 cscint;
  18         u8 awinen;
  19         u8 ioctrl;
  20         u8 iostl0;
  21         u8 iosth0;
  22         u8 iospl0;
  23         u8 iosph0;
  24         u8 iostl1;
  25         u8 iosth1;
  26         u8 iospl1;
  27         u8 iosph1;
  28         u8 smstl0;
  29         u8 smsth0;
  30         u8 smspl0;
  31         u8 smsph0;
  32         u8 moffl0;
  33         u8 moffh0;
  34         u8 cdgenc;
  35         u8 resv1;
  36         u8 smstl1;
  37         u8 smsth1;
  38         u8 smspl1;
  39         u8 smsph1;
  40         u8 moffl1;
  41         u8 moffh1;
  42         u8 glctrl;
  43         u8 atctrl;
  44         u8 smstl2;
  45         u8 smsth2;
  46         u8 smspl2;
  47         u8 smsph2;
  48         u8 moffl2;
  49         u8 moffh2;
  50         u8 resv2;
  51         u8 resv3;
  52         u8 smstl3;
  53         u8 smsth3;
  54         u8 smspl3;
  55         u8 smsph3;
  56         u8 moffl3;
  57         u8 moffh3;
  58         u8 resv4;
  59         u8 miscc1;
  60         u8 smstl4;
  61         u8 smsth4;
  62         u8 smspl4;
  63         u8 smsph4;
  64         u8 moffl4;
  65         u8 moffh4;
  66         u8 ioffl0;
  67         u8 ioffh0;
  68         u8 ioffl1;
  69         u8 ioffh1;
  70         u8 gpio;
  71         u8 resv5;
  72         u8 resv6;
  73         u8 resv7;
  74         u8 resv8;
  75         u8 resv9;
  76         u8 smpga0;
  77 } __packed pc16reg_t;