1 /* This file is part of the coreboot project. */
2 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * SMM utilities used in both SMM and normal mode
8 #include <amdblocks/acpimmio.h>
9 #include <console/console.h>
13 #define HUDSON_SMI_ACPI_COMMAND 75
15 static void configure_smi(uint8_t smi_num
, uint8_t mode
)
17 uint8_t reg32_offset
, bit_offset
;
20 /* SMI sources range from [0:149] */
22 printk(BIOS_WARNING
, "BUG: Invalid SMI: %u\n", smi_num
);
26 /* 16 sources per register, 2 bits per source; registers are 4 bytes */
27 reg32_offset
= (smi_num
/ 16) * 4;
28 bit_offset
= (smi_num
% 16) * 2;
30 reg32
= smi_read32(SMI_REG_CONTROL0
+ reg32_offset
);
31 reg32
&= ~(0x3 << (bit_offset
));
32 reg32
|= (mode
& 0x3) << bit_offset
;
33 smi_write32(SMI_REG_CONTROL0
+ reg32_offset
, reg32
);
37 * Configure generation of interrupts for given GEVENT pin
39 * @param gevent The GEVENT pin number. Valid values are 0 thru 23
40 * @param mode The type of event this pin should generate. Note that only
41 * SMI_MODE_SMI generates an SMI. SMI_MODE_DISABLE disables events.
42 * @param level SMI_LVL_LOW or SMI_LVL_HIGH
44 void hudson_configure_gevent_smi(uint8_t gevent
, uint8_t mode
, uint8_t level
)
47 /* GEVENT pins range from [0:23] */
49 printk(BIOS_WARNING
, "BUG: Invalid GEVENT: %u\n", gevent
);
53 /* SMI0 source is GEVENT0 and so on */
54 configure_smi(gevent
, mode
);
56 /* And set set the trigger level */
57 reg32
= smi_read32(SMI_REG_SMITRIG0
);
58 reg32
&= ~(1 << gevent
);
59 reg32
|= (level
& 0x1) << gevent
;
60 smi_write32(SMI_REG_SMITRIG0
, reg32
);
63 /** Disable events from given GEVENT pin */
64 void hudson_disable_gevent_smi(uint8_t gevent
)
66 /* GEVENT pins range from [0:23] */
68 printk(BIOS_WARNING
, "BUG: Invalid GEVENT: %u\n", gevent
);
72 /* SMI0 source is GEVENT0 and so on */
73 configure_smi(gevent
, SMI_MODE_DISABLE
);
76 /** Enable SMIs on writes to ACPI SMI command port */
77 void hudson_enable_acpi_cmd_smi(void)
79 configure_smi(HUDSON_SMI_ACPI_COMMAND
, SMI_MODE_SMI
);