src/soc/intel/icelake/graphics.c

   1 /* This file is part of the coreboot project. */
   2 /* SPDX-License-Identifier: GPL-2.0-or-later */
   3
   4 #include <acpi/acpi.h>
   5 #include <console/console.h>
   6 #include <fsp/util.h>
   7 #include <device/device.h>
   8 #include <device/pci.h>
   9 #include <device/pci_ops.h>
  10 #include <drivers/intel/gma/opregion.h>
  11 #include <intelblocks/graphics.h>
  12 #include <types.h>
  13
  14 uintptr_t fsp_soc_get_igd_bar(void)
  15 {
  16         return graphics_get_memory_base();
  17 }
  18
  19 void graphics_soc_init(struct device *dev)
  20 {
  21         /*
  22          * GFX PEIM module inside FSP binary is taking care of graphics
  23          * initialization based on RUN_FSP_GOP Kconfig
  24          * option and input VBT file. Hence no need to load/execute legacy VGA
  25          * OpROM in order to initialize GFX.
  26          *
  27          * In case of non-FSP solution, SoC need to select VGA_ROM_RUN
  28          * Kconfig to perform GFX initialization through VGA OpRom.
  29          */
  30         if (CONFIG(RUN_FSP_GOP))
  31                 return;
  32
  33         /* IGD needs to Bus Master */
  34         uint32_t reg32 = pci_read_config32(dev, PCI_COMMAND);
  35         reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
  36         pci_write_config32(dev, PCI_COMMAND, reg32);
  37
  38         /* Initialize PCI device, load/execute BIOS Option ROM */
  39         pci_dev_init(dev);
  40 }
  41
  42 uintptr_t graphics_soc_write_acpi_opregion(const struct device *device,
  43                 uintptr_t current, struct acpi_rsdp *rsdp)
  44 {
  45         igd_opregion_t *opregion;
  46
  47         printk(BIOS_DEBUG, "ACPI:    * IGD OpRegion\n");
  48         opregion = (igd_opregion_t *)current;
  49
  50         if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS)
  51                 return current;
  52
  53         current += sizeof(igd_opregion_t);
  54
  55         return acpi_align_current(current);
  56 }