1 /* This file is part of the coreboot project. */
2 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <device/pci_ids.h>
7 #include <intelblocks/sram.h>
10 __weak
void soc_sram_init(struct device
*dev
) { /* no-op */ }
12 static void sram_read_resources(struct device
*dev
)
15 pci_dev_read_resources(dev
);
17 res
= new_resource(dev
, PCI_BASE_ADDRESS_0
);
18 res
->base
= SRAM_BASE_0
;
19 res
->size
= SRAM_SIZE_0
;
20 res
->flags
= IORESOURCE_MEM
| IORESOURCE_ASSIGNED
| IORESOURCE_FIXED
;
22 res
= new_resource(dev
, PCI_BASE_ADDRESS_2
);
23 res
->base
= SRAM_BASE_2
;
24 res
->size
= SRAM_SIZE_2
;
25 res
->flags
= IORESOURCE_MEM
| IORESOURCE_ASSIGNED
| IORESOURCE_FIXED
;
28 static const struct device_operations device_ops
= {
29 .read_resources
= sram_read_resources
,
30 .set_resources
= pci_dev_set_resources
,
31 .enable_resources
= pci_dev_enable_resources
,
32 .init
= soc_sram_init
,
33 .ops_pci
= &pci_dev_ops_pci
,
36 static const unsigned short pci_device_ids
[] = {
37 PCI_DEVICE_ID_INTEL_APL_SRAM
,
38 PCI_DEVICE_ID_INTEL_GLK_SRAM
,
39 PCI_DEVICE_ID_INTEL_ICL_SRAM
,
40 PCI_DEVICE_ID_INTEL_CMP_SRAM
,
41 PCI_DEVICE_ID_INTEL_CMP_H_SRAM
,
42 PCI_DEVICE_ID_INTEL_TGL_SRAM
,
43 PCI_DEVICE_ID_INTEL_MCC_SRAM
,
44 PCI_DEVICE_ID_INTEL_JSP_SRAM
,
48 static const struct pci_driver sram __pci_driver
= {
50 .vendor
= PCI_VENDOR_ID_INTEL
,
51 .devices
= pci_device_ids
,