src/soc/intel/cannonlake/gpio_common.c

   1 /* This file is part of the coreboot project. */
   2 /* SPDX-License-Identifier: GPL-2.0-or-later */
   3
   4 #include <intelblocks/gpio.h>
   5 #include <soc/soc_chip.h>
   6
   7 /*
   8  * Routine to perform below operations:
   9  * 1. SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register
  10  * 2. Program GPIO PM configuration based on PM mask and value
  11  */
  12 void soc_gpio_pm_configuration(void)
  13 {
  14         uint8_t value[TOTAL_GPIO_COMM];
  15         const config_t *config = config_of_soc();
  16
  17         if (config->gpio_override_pm)
  18                 memcpy(value, config->gpio_pm, sizeof(uint8_t) *
  19                                 TOTAL_GPIO_COMM);
  20         else
  21                 memset(value, MISCCFG_ENABLE_GPIO_PM_CONFIG, sizeof(uint8_t) *
  22                                 TOTAL_GPIO_COMM);
  23
  24         gpio_pm_configure(value, TOTAL_GPIO_COMM);
  25 }