1 /* This file is part of the coreboot project. */
2 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 #ifndef _SOC_INT_DEFINE_ASL_
5 #define _SOC_INT_DEFINE_ASL_
7 #define SDCARD_INT 3 /* Need to be shared by PMC and SCC only*/
8 #define UART0_INT 4 /* Need to be shared by PMC and SCC only*/
9 #define UART1_INT 5 /* Need to be shared by PMC and SCC only*/
10 #define UART2_INT 6 /* Need to be shared by PMC and SCC only*/
11 #define UART3_INT 7 /* Need to be shared by PMC and SCC only*/
12 #define XDCI_INT 13 /* Need to be shared by PMC and SCC only*/
13 #define GPIO_BANK_INT 14
21 #define XHCI_INT 17 /* Need to be shared by PMC and SCC only*/
22 #define SMBUS_INT 20 /* PIRQE */
23 #define CSE_INT 20 /* PIRQE */
24 #define IUNIT_INT 21 /* PIRQF */
47 #endif /* _SOC_INT_DEFINE_ASL_ */