src/mainboard/google/gale/mmu.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <arch/cache.h>
   4 #include <symbols.h>
   5 #include <soc/soc_services.h>
   6 #include "mmu.h"
   7
   8 #define WIFI_IMEM_0_START       ((uintptr_t)_wifi_imem_0 / KiB)
   9 #define WIFI_IMEM_0_END         ((uintptr_t)_ewifi_imem_0 / KiB)
  10 #define WIFI_IMEM_1_START       ((uintptr_t)_wifi_imem_1 / KiB)
  11 #define WIFI_IMEM_1_END         ((uintptr_t)_ewifi_imem_1 / KiB)
  12
  13 #define OC_IMEM_START           ((uintptr_t)_oc_imem / KiB)
  14 #define OC_IMEM_END             ((uintptr_t)_eoc_imem / KiB)
  15
  16 #define DRAM_START              ((uintptr_t)_dram / MiB)
  17 #define DRAM_SIZE               (CONFIG_DRAM_SIZE_MB)
  18 #define DRAM_END                (DRAM_START + DRAM_SIZE)
  19
  20 /* DMA memory for drivers */
  21 #define DMA_START            ((uintptr_t)_dma_coherent / MiB)
  22 #define DMA_SIZE             (REGION_SIZE(dma_coherent) / MiB)
  23
  24 void setup_dram_mappings(enum dram_state dram)
  25 {
  26         if (dram == DRAM_INITIALIZED) {
  27                 mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
  28                 /* Map DMA memory */
  29                 mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
  30                 /* Mark cbmem backing store as ready. */
  31                 if (ENV_ROMSTAGE)
  32                         ipq_cbmem_backing_store_ready();
  33         } else {
  34                 mmu_disable_range(DRAM_START, DRAM_SIZE);
  35                 /* Map DMA memory */
  36                 mmu_disable_range(DMA_START, DMA_SIZE);
  37         }
  38 }
  39
  40 void setup_mmu(enum dram_state dram)
  41 {
  42         dcache_mmu_disable();
  43
  44         mmu_init();
  45
  46         /* start with mapping everything as strongly ordered. */
  47         mmu_config_range(0, 4096, DCACHE_OFF);
  48
  49         /* Map Device memory. */
  50         mmu_config_range_kb(WIFI_IMEM_0_START,
  51                                 WIFI_IMEM_0_END - WIFI_IMEM_0_START,
  52                                 DCACHE_WRITEBACK);
  53
  54         mmu_config_range_kb(WIFI_IMEM_1_START,
  55                                 WIFI_IMEM_1_END - WIFI_IMEM_1_START,
  56                                 DCACHE_WRITEBACK);
  57
  58         mmu_config_range_kb(OC_IMEM_START,
  59                                 OC_IMEM_END - OC_IMEM_START,
  60                                 DCACHE_WRITEBACK);
  61
  62         /* Map DRAM memory */
  63         setup_dram_mappings(dram);
  64
  65         mmu_disable_range(DRAM_END, 4096 - DRAM_END);
  66
  67         /* disable Page 0 for trapping NULL pointer references. */
  68         mmu_disable_range_kb(0, 1);
  69
  70         dcache_mmu_enable();
  71 }