src/mainboard/asus/p2b/variants/p2b-ds/mptable.c

   1 /* This file is part of the coreboot project. */
   2 /* SPDX-License-Identifier: GPL-2.0-or-later */
   3
   4 #include <arch/smp/mpspec.h>
   5 #include <arch/ioapic.h>
   6 #include <stdint.h>
   7
   8 static void *smp_write_config_table(void *v)
   9 {
  10         int ioapic_id, ioapic_ver, isa_bus;
  11         struct mp_config_table *mc;
  12
  13         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
  14
  15         mptable_init(mc, LOCAL_APIC_ADDR);
  16
  17         smp_write_processors(mc);
  18
  19         mptable_write_buses(mc, NULL, &isa_bus);
  20
  21         ioapic_id = 2;
  22         ioapic_ver = 0x11; /* External Intel 82093AA IOAPIC. */
  23         smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
  24
  25         /* Legacy Interrupts */
  26         mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);
  27
  28         /* I/O Ints:          Type       Trigger                Polarity              Bus ID   IRQ   APIC ID      PIN# */
  29         smp_write_intsrc(mc,  mp_INT,    MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,  0x0,     0x13, ioapic_id,   0x13);
  30         smp_write_intsrc(mc,  mp_INT,    MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,  0x0,     0x18, ioapic_id,   0x13);
  31
  32         /* Local Ints:        Type       Trigger                Polarity              Bus ID   IRQ   APIC ID      PIN# */
  33         mptable_lintsrc(mc, 0x1);
  34
  35         /* Compute the checksums. */
  36         return mptable_finalize(mc);
  37 }
  38
  39 unsigned long write_smp_table(unsigned long addr)
  40 {
  41         void *v;
  42         v = smp_write_floating_table(addr, 0);
  43         return (unsigned long)smp_write_config_table(v);
  44 }