src/mainboard/asus/p2b/variants/p2b-d/irq_tables.c

   1 /* This file is part of the coreboot project. */
   2 /* SPDX-License-Identifier: GPL-2.0-or-later */
   3
   4 #include <arch/pirq_routing.h>
   5
   6 static const struct irq_routing_table intel_irq_routing_table = {
   7         PIRQ_SIGNATURE,
   8         PIRQ_VERSION,
   9         32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
  10         0x00,                   /* Interrupt router bus */
  11         (0x04 << 3) | 0x0,      /* Interrupt router device */
  12         0,                      /* IRQs devoted exclusively to PCI usage */
  13         0x8086,                 /* Vendor */
  14         0x122e,                 /* Device */
  15         0,                      /* Miniport data */
  16         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
  17         0x54,                   /* Checksum */
  18         {
  19                 /* bus,        dev | fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
  20                 {0x00, (0x0c << 3) | 0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}}, 0x1, 0x0},
  21                 {0x00, (0x0b << 3) | 0x0, {{0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}, {0x60, 0x1eb8}}, 0x2, 0x0},
  22                 {0x00, (0x0a << 3) | 0x0, {{0x62, 0x1eb8}, {0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x1eb8}}, 0x3, 0x0},
  23                 {0x00, (0x09 << 3) | 0x0, {{0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}}, 0x4, 0x0},
  24                 {0x00, (0x04 << 3) | 0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}}, 0x0, 0x0},
  25                 {0x00, (0x01 << 3) | 0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}}, 0x0, 0x0},
  26         }
  27 };
  28
  29 unsigned long write_pirq_routing_table(unsigned long addr)
  30 {
  31         return copy_pirq_routing_table(addr, &intel_irq_routing_table);
  32 }