1 /* This file is part of the coreboot project. */
2 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 #ifndef _FSP2_0_INFO_HEADER_H_
5 #define _FSP2_0_INFO_HEADER_H_
10 #define FSP_HDR_OFFSET 0x94
11 #define FSP_HDR_LEN 0x48
12 #define FSP_HDR_SIGNATURE "FSPH"
13 #define FSP_HDR_ATTRIB_FSPT 1
14 #define FSP_HDR_ATTRIB_FSPM 2
15 #define FSP_HDR_ATTRIB_FSPS 3
18 uint32_t fsp_revision
;
21 uint16_t image_attribute
;
23 uint16_t component_attribute
;
24 size_t cfg_region_offset
;
25 size_t cfg_region_size
;
26 size_t temp_ram_init_entry
;
27 size_t temp_ram_exit_entry
;
28 size_t notify_phase_entry_offset
;
29 size_t memory_init_entry_offset
;
30 size_t silicon_init_entry_offset
;
31 char image_id
[sizeof(uint64_t) + 1];
35 enum cb_err
fsp_identify(struct fsp_header
*hdr
, const void *fsp_blob
);
38 * This is a FSP_INFO_HEADER that came from fsps.bin blob. It contains
39 * both SiliconInit and Notify APIs. When SiliconInit is loaded the
40 * header is saved so that when Notify is called we do not have to start
41 * header parsing again.
43 extern struct fsp_header fsps_hdr
;
45 #endif /* _FSP2_0_INFO_HEADER_H_ */