treewide: replace GPLv2 long form headers with SPDX header
[coreboot.git] / src / drivers / intel / fsp2_0 / hob_verify.c
blobb0adbfea7d719934597a8ca9a383daeea60536b0
1 /* This file is part of the coreboot project. */
2 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 #include <cbmem.h>
5 #include <console/console.h>
6 #include <fsp/util.h>
8 void fsp_verify_memory_init_hobs(void)
10 struct range_entry fsp_mem;
11 struct range_entry tolum;
13 /* Verify the size of the TOLUM range */
14 fsp_find_bootloader_tolum(&tolum);
15 if (range_entry_size(&tolum) < cbmem_overhead_size()) {
16 printk(BIOS_CRIT,
17 "FSP_BOOTLOADER_TOLUM_SIZE: 0x%08llx < 0x%08zx\n",
18 range_entry_size(&tolum), cbmem_overhead_size());
19 die("FSP_BOOTLOADER_TOLUM_HOB too small!\n");
22 /* Verify the bootloader tolum is above the FSP reserved area */
23 fsp_find_reserved_memory(&fsp_mem);
24 if (range_entry_end(&tolum) <= range_entry_base(&fsp_mem)) {
25 printk(BIOS_CRIT,
26 "TOLUM end: 0x%08llx != 0x%08llx: FSP rsvd base\n",
27 range_entry_end(&tolum), range_entry_base(&fsp_mem));
28 die("FSP reserved region after BIOS TOLUM!\n");
30 if (range_entry_base(&tolum) < range_entry_end(&fsp_mem)) {
31 printk(BIOS_CRIT,
32 "TOLUM base: 0x%08llx < 0x%08llx: FSP rsvd end\n",
33 range_entry_base(&tolum), range_entry_end(&fsp_mem));
34 die("FSP reserved region overlaps BIOS TOLUM!\n");
37 /* Verify that the FSP reserved area immediately follows the BIOS
38 * reserved area
40 if (range_entry_base(&tolum) != range_entry_end(&fsp_mem)) {
41 printk(BIOS_CRIT,
42 "TOLUM base: 0x%08llx != 0x%08llx: FSP rsvd end\n",
43 range_entry_base(&tolum), range_entry_end(&fsp_mem));
44 die("Space between FSP reserved region and BIOS TOLUM!\n");
47 if (range_entry_end(&tolum) != (uintptr_t)cbmem_top()) {
48 printk(BIOS_CRIT, "TOLUM end: 0x%08llx != %p: cbmem_top\n",
49 range_entry_end(&tolum), cbmem_top());
50 die("Space between cbmem_top and BIOS TOLUM!\n");