treewide: replace GPLv2 long form headers with SPDX header
[coreboot.git] / src / drivers / intel / fsp2_0 / header_display.c
blob19f4998777b7b4c0cbed1ceafce24756d26f6fef
1 /* This file is part of the coreboot project. */
2 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 #include <console/console.h>
5 #include <fsp/util.h>
7 void fsp_print_header_info(const struct fsp_header *hdr)
9 union {
10 uint32_t val;
11 struct {
12 uint8_t bld_num;
13 uint8_t revision;
14 uint8_t minor;
15 uint8_t major;
16 } rev;
17 } revision;
19 revision.val = hdr->fsp_revision;
21 printk(BIOS_SPEW, "Spec version: v%u.%u\n", (hdr->spec_version >> 4),
22 hdr->spec_version & 0xf);
23 printk(BIOS_SPEW, "Revision: %u.%u.%u, Build Number %u\n",
24 revision.rev.major,
25 revision.rev.minor,
26 revision.rev.revision,
27 revision.rev.bld_num);
28 printk(BIOS_SPEW, "Type: %s/%s\n",
29 (hdr->component_attribute & 1) ? "release" : "debug",
30 (hdr->component_attribute & 2) ? "test" : "official");
31 printk(BIOS_SPEW, "image ID: %s, base 0x%lx + 0x%zx\n",
32 hdr->image_id, hdr->image_base, hdr->image_size);
33 printk(BIOS_SPEW, "\tConfig region 0x%zx + 0x%zx\n",
34 hdr->cfg_region_offset, hdr->cfg_region_size);
36 if ((hdr->component_attribute >> 12) == FSP_HDR_ATTRIB_FSPM) {
37 printk(BIOS_SPEW, "\tMemory init offset 0x%zx\n",
38 hdr->memory_init_entry_offset);
41 if ((hdr->component_attribute >> 12) == FSP_HDR_ATTRIB_FSPS) {
42 printk(BIOS_SPEW, "\tSilicon init offset 0x%zx\n",
43 hdr->silicon_init_entry_offset);
44 printk(BIOS_SPEW, "\tNotify phase offset 0x%zx\n",
45 hdr->notify_phase_entry_offset);