tree: drop last paragraph of GPL copyright header
[coreboot.git] / util / ifdtool / ifdtool.h
blob78787126ea675cedd0442e9d6cefcd4288fb043b
1 /*
2 * ifdtool - dump Intel Firmware Descriptor information
4 * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <stdint.h>
17 #define IFDTOOL_VERSION "1.2"
19 enum ifd_version {
20 IFD_VERSION_1,
21 IFD_VERSION_2,
24 #define LAYOUT_LINELEN 80
26 enum spi_frequency {
27 SPI_FREQUENCY_20MHZ = 0,
28 SPI_FREQUENCY_33MHZ = 1,
29 SPI_FREQUENCY_48MHZ = 2,
30 SPI_FREQUENCY_50MHZ_30MHZ = 4,
31 SPI_FREQUENCY_17MHZ = 6,
34 enum component_density {
35 COMPONENT_DENSITY_512KB = 0,
36 COMPONENT_DENSITY_1MB = 1,
37 COMPONENT_DENSITY_2MB = 2,
38 COMPONENT_DENSITY_4MB = 3,
39 COMPONENT_DENSITY_8MB = 4,
40 COMPONENT_DENSITY_16MB = 5,
41 COMPONENT_DENSITY_32MB = 6,
42 COMPONENT_DENSITY_64MB = 7,
43 COMPONENT_DENSITY_UNUSED = 0xf
46 // flash descriptor
47 typedef struct {
48 uint32_t flvalsig;
49 uint32_t flmap0;
50 uint32_t flmap1;
51 uint32_t flmap2;
52 uint8_t reserved[0xefc - 0x20];
53 uint32_t flumap1;
54 } __attribute__((packed)) fdbar_t;
56 // regions
57 #define MAX_REGIONS 9
58 #define MAX_REGIONS_OLD 5
59 typedef struct {
60 uint32_t flreg0;
61 uint32_t flreg1;
62 uint32_t flreg2;
63 uint32_t flreg3;
64 uint32_t flreg4;
65 uint32_t flreg5;
66 uint32_t flreg6;
67 uint32_t flreg7;
68 uint32_t flreg8;
69 } __attribute__((packed)) frba_t;
71 // component section
72 typedef struct {
73 uint32_t flcomp;
74 uint32_t flill;
75 uint32_t flpb;
76 } __attribute__((packed)) fcba_t;
78 // pch strap
79 typedef struct {
80 uint32_t pchstrp0;
81 uint32_t pchstrp1;
82 uint32_t pchstrp2;
83 uint32_t pchstrp3;
84 uint32_t pchstrp4;
85 uint32_t pchstrp5;
86 uint32_t pchstrp6;
87 uint32_t pchstrp7;
88 uint32_t pchstrp8;
89 uint32_t pchstrp9;
90 uint32_t pchstrp10;
91 uint32_t pchstrp11;
92 uint32_t pchstrp12;
93 uint32_t pchstrp13;
94 uint32_t pchstrp14;
95 uint32_t pchstrp15;
96 uint32_t pchstrp16;
97 uint32_t pchstrp17;
98 } __attribute__((packed)) fpsba_t;
101 * WR / RD bits start at different locations within the flmstr regs, but
102 * otherwise have identical meaning.
104 #define FLMSTR_WR_SHIFT_V1 24
105 #define FLMSTR_WR_SHIFT_V2 20
106 #define FLMSTR_RD_SHIFT_V1 16
107 #define FLMSTR_RD_SHIFT_V2 8
109 // master
110 typedef struct {
111 uint32_t flmstr1;
112 uint32_t flmstr2;
113 uint32_t flmstr3;
114 uint32_t flmstr4;
115 uint32_t flmstr5;
116 } __attribute__((packed)) fmba_t;
118 // processor strap
119 typedef struct {
120 uint32_t data[8];
121 } __attribute__((packed)) fmsba_t;
123 // ME VSCC
124 typedef struct {
125 uint32_t jid;
126 uint32_t vscc;
127 } vscc_t;
129 typedef struct {
130 // Actual number of entries specified in vtl
131 vscc_t entry[8];
132 } vtba_t;
134 typedef struct {
135 int base, limit, size;
136 } region_t;
138 struct region_name {
139 char *pretty;
140 char *terse;