tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / superio / nsc / pc97317 / early_serial.c
blobf13f98bd5f6bed3c7c5fa7762c47dd01dd359ebe
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2000 AG Electronics Ltd.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <arch/io.h>
18 #include <device/pnp.h>
19 #include <stdint.h>
20 #include "pc97317.h"
22 #define PM_DEV PNP_DEV(0x2e, PC97317_PM)
23 #define PM_BASE 0xe8
25 /* The PC97317 needs clocks to be set up before the serial port will operate. */
26 void pc97317_enable_serial(pnp_devfn_t dev, u16 iobase)
28 /* Set base address of power management unit. */
29 pnp_set_logical_device(PM_DEV);
30 pnp_set_enable(dev, 0);
31 pnp_set_iobase(dev, PNP_IDX_IO0, PM_BASE);
32 pnp_set_enable(dev, 1);
34 /* Use on-chip clock multiplier. */
35 outb(0x03, PM_BASE);
36 outb(inb(PM_BASE + 1) | 0x07, PM_BASE + 1);
38 /* Wait for the clock to stabilise. */
39 while(!(inb(PM_BASE + 1) & 0x80))
42 /* Set the base address of the port. */
43 pnp_set_logical_device(dev);
44 pnp_set_enable(dev, 0);
45 pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
46 pnp_set_enable(dev, 1);