tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / superio / ite / it8728f / it8728f_hwm.c
blob5ab4a39bde930a734c7c2cfe80c8d369fc03adb9
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <arch/io.h>
18 #include <console/console.h>
19 #include <device/device.h>
20 #include <device/pnp.h>
21 #include "chip.h"
22 #include "it8728f_internal.h"
25 * FAN controller configuration register index's
27 #define HWM_MAIN_CTL_REG 0x13 /* default 0x07 */
28 #define HWM_CTL_REG 0x14 /* default 0x40 */
29 #define HWM_FAN1_CTL_PWM 0x15 /* default 0x00 */
30 #define HWM_FAN2_CTL_PWM 0x16 /* default 0x00 */
31 #define HWM_FAN3_CTL_PWM 0x17 /* default 0x00 */
32 #define HWM_ADC_TEMP_CHAN_EN_REG 0x51 /* default 0x00 */
34 void it8728f_hwm_ec_init(struct device *dev)
36 struct superio_ite_it8728f_config *conf = dev->chip_info;
37 struct resource *res = find_resource(dev, PNP_IDX_IO0);
39 if (!res) {
40 printk(BIOS_WARNING, "Super I/O HWM: No HWM resource found.\n");
41 return;
43 /* I/O port for HWM is at base + 5 */
44 u16 port = res->base + 5;
46 printk(BIOS_INFO,
47 "ITE IT8728F Super I/O HWM: Initializing Hardware Monitor..\n");
48 printk(BIOS_DEBUG,
49 "ITE IT8728F Super I/O HWM: Base Address at 0x%x\n", port);
51 pnp_enter_conf_mode(dev);
52 pnp_set_logical_device(dev);
54 /* ITE IT8728F HWM (ordered) programming sequence. */
56 /* configure fan polarity */
57 pnp_write_index(port, HWM_CTL_REG, conf->hwm_ctl_register);
59 /* enable fans 1-3 */
60 pnp_write_index(port, HWM_MAIN_CTL_REG, conf->hwm_main_ctl_register);
62 /* enable termistor temps for temp1-temp3 */
63 pnp_write_index(port, HWM_ADC_TEMP_CHAN_EN_REG, conf->hwm_adc_temp_chan_en_reg);
65 /* configure which fanX uses which tempY */
66 pnp_write_index(port, HWM_FAN1_CTL_PWM, conf->hwm_fan1_ctl_pwm);
67 pnp_write_index(port, HWM_FAN2_CTL_PWM, conf->hwm_fan2_ctl_pwm);
68 pnp_write_index(port, HWM_FAN3_CTL_PWM, conf->hwm_fan3_ctl_pwm);
70 pnp_exit_conf_mode(dev);