tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / southbridge / nvidia / mcp55 / smbus.c
blob7829a2843ce89929e20f2645300053606e11ae50
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2004 Tyan Computer
5 * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
6 * Copyright (C) 2006,2007 AMD
7 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
20 #include <console/console.h>
21 #include <device/device.h>
22 #include <device/pci.h>
23 #include <device/pci_ids.h>
24 #include <device/pci_ops.h>
25 #include <device/smbus.h>
26 #include <arch/io.h>
27 #include "mcp55.h"
28 #include "smbus.h"
30 static int lsmbus_recv_byte(device_t dev)
32 unsigned device;
33 struct resource *res;
34 struct bus *pbus;
36 device = dev->path.i2c.device;
37 pbus = get_pbus_smbus(dev);
39 res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
41 return do_smbus_recv_byte(res->base, device);
44 static int lsmbus_send_byte(device_t dev, u8 val)
46 unsigned device;
47 struct resource *res;
48 struct bus *pbus;
50 device = dev->path.i2c.device;
51 pbus = get_pbus_smbus(dev);
53 res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
55 return do_smbus_send_byte(res->base, device, val);
58 static int lsmbus_read_byte(device_t dev, u8 address)
60 unsigned device;
61 struct resource *res;
62 struct bus *pbus;
64 device = dev->path.i2c.device;
65 pbus = get_pbus_smbus(dev);
67 res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
69 return do_smbus_read_byte(res->base, device, address);
72 static int lsmbus_write_byte(device_t dev, u8 address, u8 val)
74 unsigned device;
75 struct resource *res;
76 struct bus *pbus;
78 device = dev->path.i2c.device;
79 pbus = get_pbus_smbus(dev);
81 res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
83 return do_smbus_write_byte(res->base, device, address, val);
85 static struct smbus_bus_operations lops_smbus_bus = {
86 .recv_byte = lsmbus_recv_byte,
87 .send_byte = lsmbus_send_byte,
88 .read_byte = lsmbus_read_byte,
89 .write_byte = lsmbus_write_byte,
92 #if CONFIG_HAVE_ACPI_TABLES
93 unsigned pm_base;
94 #endif
96 static void mcp55_sm_read_resources(device_t dev)
98 unsigned long index;
100 /* Get the normal pci resources of this device */
101 pci_dev_read_resources(dev);
103 for (index = 0x60; index <= 0x68; index+=4) { // We got another 3.
104 pci_get_resource(dev, index);
106 compact_resources(dev);
109 static void mcp55_sm_init(device_t dev)
111 #if CONFIG_HAVE_ACPI_TABLES
112 struct resource *res;
114 res = find_resource(dev, 0x60);
116 if (res)
117 pm_base = res->base;
118 #endif
121 static struct device_operations smbus_ops = {
122 .read_resources = mcp55_sm_read_resources,
123 .set_resources = pci_dev_set_resources,
124 .enable_resources = pci_dev_enable_resources,
125 .init = mcp55_sm_init,
126 .scan_bus = scan_smbus,
127 // .enable = mcp55_enable,
128 .ops_pci = &mcp55_pci_ops,
129 .ops_smbus_bus = &lops_smbus_bus,
131 static const struct pci_driver smbus_driver __pci_driver = {
132 .ops = &smbus_ops,
133 .vendor = PCI_VENDOR_ID_NVIDIA,
134 .device = PCI_DEVICE_ID_NVIDIA_MCP55_SM2,