src/southbridge/intel/i82801ix/bootblock.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <arch/io.h>
  17
  18 static void enable_spi_prefetch(void)
  19 {
  20         u8 reg8;
  21         pci_devfn_t dev;
  22
  23         dev = PCI_DEV(0, 0x1f, 0);
  24
  25         reg8 = pci_read_config8(dev, 0xdc);
  26         reg8 &= ~(3 << 2);
  27         reg8 |= (2 << 2); /* Prefetching and Caching Enabled */
  28         pci_write_config8(dev, 0xdc, reg8);
  29 }
  30
  31 static void bootblock_southbridge_init(void)
  32 {
  33         enable_spi_prefetch();
  34 }