src/southbridge/intel/i82801dx/ide.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2004 Ronald G. Minnich
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <console/console.h>
  18 #include <device/device.h>
  19 #include <device/pci.h>
  20 #include <device/pci_ids.h>
  21 #include <device/pci_ops.h>
  22 #include "i82801dx.h"
  23
  24 typedef struct southbridge_intel_i82801dx_config config_t;
  25
  26 static void ide_init(struct device *dev)
  27 {
  28         /* Get the chip configuration */
  29         config_t *config = dev->chip_info;
  30
  31         /* Enable IDE devices so the Linux IDE driver will work. */
  32         uint16_t ideTimingConfig;
  33
  34         ideTimingConfig = pci_read_config16(dev, IDE_TIM_PRI);
  35         ideTimingConfig &= ~IDE_DECODE_ENABLE;
  36         if (!config || config->ide0_enable) {
  37                 /* Enable primary IDE interface. */
  38                 ideTimingConfig |= IDE_DECODE_ENABLE;
  39                 printk(BIOS_DEBUG, "IDE0: Primary IDE interface is enabled\n");
  40         } else {
  41                 printk(BIOS_INFO, "IDE0: Primary IDE interface is disabled\n");
  42         }
  43         pci_write_config16(dev, IDE_TIM_PRI, ideTimingConfig);
  44
  45         ideTimingConfig = pci_read_config16(dev, IDE_TIM_SEC);
  46         ideTimingConfig &= ~IDE_DECODE_ENABLE;
  47         if (!config || config->ide1_enable) {
  48                 /* Enable secondary IDE interface. */
  49                 ideTimingConfig |= IDE_DECODE_ENABLE;
  50                 printk(BIOS_DEBUG, "IDE1: Secondary IDE interface is enabled\n");
  51         } else {
  52                 printk(BIOS_INFO, "IDE1: Secondary IDE interface is disabled\n");
  53         }
  54         pci_write_config16(dev, IDE_TIM_SEC, ideTimingConfig);
  55 }
  56
  57 static struct device_operations ide_ops = {
  58         .read_resources = pci_dev_read_resources,
  59         .set_resources = pci_dev_set_resources,
  60         .enable_resources = pci_dev_enable_resources,
  61         .init = ide_init,
  62         .scan_bus = 0,
  63         .enable = i82801dx_enable,
  64 };
  65
  66 /* 82801DB */
  67 static const struct pci_driver i82801db_ide __pci_driver = {
  68         .ops = &ide_ops,
  69         .vendor = PCI_VENDOR_ID_INTEL,
  70         .device = 0x24cb,
  71 };
  72
  73 /* 82801DBM */
  74 static const struct pci_driver i82801dbm_ide __pci_driver = {
  75         .ops = &ide_ops,
  76         .vendor = PCI_VENDOR_ID_INTEL,
  77         .device = 0x24ca,
  78 };