tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / southbridge / intel / fsp_bd82x6x / acpi / lpc.asl
blob5204b29d48b58df1e67b3385019744e6db460456
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2007-2009 coresystems GmbH
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; version 2 of
9  * the License.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
17 // Intel LPC Bus Device  - 0:1f.0
19 Device (LPCB)
21         Name(_ADR, 0x001f0000)
23         OperationRegion(LPC0, PCI_Config, 0x00, 0x100)
24         Field (LPC0, AnyAcc, NoLock, Preserve)
25         {
26                 Offset (0x40),
27                 PMBS,   16,     // PMBASE
28                 Offset (0x60),  // Interrupt Routing Registers
29                 PRTA,   8,
30                 PRTB,   8,
31                 PRTC,   8,
32                 PRTD,   8,
33                 Offset (0x68),
34                 PRTE,   8,
35                 PRTF,   8,
36                 PRTG,   8,
37                 PRTH,   8,
39                 Offset (0x80),  // IO Decode Ranges
40                 IOD0,   8,
41                 IOD1,   8,
43                 Offset (0xb8),  // GPIO Routing Control
44                 GR00,    2,
45                 GR01,    2,
46                 GR02,    2,
47                 GR03,    2,
48                 GR04,    2,
49                 GR05,    2,
50                 GR06,    2,
51                 GR07,    2,
52                 GR08,    2,
53                 GR09,    2,
54                 GR10,    2,
55                 GR11,    2,
56                 GR12,    2,
57                 GR13,    2,
58                 GR14,    2,
59                 GR15,    2,
61                 Offset (0xf0),  // RCBA
62                 RCEN,   1,
63                 ,       13,
64                 RCBA,   18,
65         }
67         #include "irqlinks.asl"
69         #include "acpi/ec.asl"
71         Device (DMAC)           // DMA Controller
72         {
73                 Name(_HID, EISAID("PNP0200"))
74                 Name(_CRS, ResourceTemplate()
75                 {
76                         IO (Decode16, 0x00, 0x00, 0x01, 0x20)
77                         IO (Decode16, 0x81, 0x81, 0x01, 0x11)
78                         IO (Decode16, 0x93, 0x93, 0x01, 0x0d)
79                         IO (Decode16, 0xc0, 0xc0, 0x01, 0x20)
80                         DMA (Compatibility, NotBusMaster, Transfer8_16) { 4 }
81                 })
82         }
84         Device (FWH)            // Firmware Hub
85         {
86                 Name (_HID, EISAID("INT0800"))
87                 Name (_CRS, ResourceTemplate()
88                 {
89                         Memory32Fixed(ReadOnly, 0xff000000, 0x01000000)
90                 })
91         }
93         Device (HPET)
94         {
95                 Name (_HID, EISAID("PNP0103"))
96                 Name (_CID, 0x010CD041)
98                 Name(BUF0, ResourceTemplate()
99                 {
100                         Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
101                 })
103                 Method (_STA, 0)        // Device Status
104                 {
105                         If (HPTE) {
106                                 // Note: Ancient versions of Windows don't want
107                                 // to see the HPET in order to work right
108                                 If (LGreaterEqual(OSYS, 2001)) {
109                                         Return (0xf)    // Enable and show device
110                                 } Else {
111                                         Return (0xb)    // Enable and don't show device
112                                 }
113                         }
115                         Return (0x0)    // Not enabled, don't show.
116                 }
118                 Method (_CRS, 0, Serialized) // Current resources
119                 {
120                         If (HPTE) {
121                                 CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
122                                 If (Lequal(HPAS, 1)) {
123                                         Store(0xfed01000, HPT0)
124                                 }
126                                 If (Lequal(HPAS, 2)) {
127                                         Store(0xfed02000, HPT0)
128                                 }
130                                 If (Lequal(HPAS, 3)) {
131                                         Store(0xfed03000, HPT0)
132                                 }
133                         }
135                         Return (BUF0)
136                 }
137         }
139         Device(PIC)     // 8259 Interrupt Controller
140         {
141                 Name(_HID,EISAID("PNP0000"))
142                 Name(_CRS, ResourceTemplate()
143                 {
144                         IO (Decode16, 0x20, 0x20, 0x01, 0x02)
145                         IO (Decode16, 0x24, 0x24, 0x01, 0x02)
146                         IO (Decode16, 0x28, 0x28, 0x01, 0x02)
147                         IO (Decode16, 0x2c, 0x2c, 0x01, 0x02)
148                         IO (Decode16, 0x30, 0x30, 0x01, 0x02)
149                         IO (Decode16, 0x34, 0x34, 0x01, 0x02)
150                         IO (Decode16, 0x38, 0x38, 0x01, 0x02)
151                         IO (Decode16, 0x3c, 0x3c, 0x01, 0x02)
152                         IO (Decode16, 0xa0, 0xa0, 0x01, 0x02)
153                         IO (Decode16, 0xa4, 0xa4, 0x01, 0x02)
154                         IO (Decode16, 0xa8, 0xa8, 0x01, 0x02)
155                         IO (Decode16, 0xac, 0xac, 0x01, 0x02)
156                         IO (Decode16, 0xb0, 0xb0, 0x01, 0x02)
157                         IO (Decode16, 0xb4, 0xb4, 0x01, 0x02)
158                         IO (Decode16, 0xb8, 0xb8, 0x01, 0x02)
159                         IO (Decode16, 0xbc, 0xbc, 0x01, 0x02)
160                         IO (Decode16, 0x4d0, 0x4d0, 0x01, 0x02)
161                         IRQNoFlags () { 2 }
162                 })
163         }
165         Device(MATH)    // FPU
166         {
167                 Name (_HID, EISAID("PNP0C04"))
168                 Name (_CRS, ResourceTemplate()
169                 {
170                         IO (Decode16, 0xf0, 0xf0, 0x01, 0x01)
171                         IRQNoFlags() { 13 }
172                 })
173         }
175         Device(LDRC)    // LPC device: Resource consumption
176         {
177                 Name (_HID, EISAID("PNP0C02"))
178                 Name (_UID, 2)
179                 Name (_CRS, ResourceTemplate()
180                 {
181                         IO (Decode16, 0x2e, 0x2e, 0x1, 0x02)            // First SuperIO
182                         IO (Decode16, 0x4e, 0x4e, 0x1, 0x02)            // Second SuperIO
183                         IO (Decode16, 0x61, 0x61, 0x1, 0x01)            // NMI Status
184                         IO (Decode16, 0x63, 0x63, 0x1, 0x01)            // CPU Reserved
185                         IO (Decode16, 0x65, 0x65, 0x1, 0x01)            // CPU Reserved
186                         IO (Decode16, 0x67, 0x67, 0x1, 0x01)            // CPU Reserved
187                         IO (Decode16, 0x80, 0x80, 0x1, 0x01)            // Port 80 Post
188                         IO (Decode16, 0x92, 0x92, 0x1, 0x01)            // CPU Reserved
189                         IO (Decode16, 0xb2, 0xb2, 0x1, 0x02)            // SWSMI
190                         //IO (Decode16, 0x800, 0x800, 0x1, 0x10)                // ACPI I/O trap
191                         IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80)        // ICH7-M ACPI
192                         IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40)    // ICH7-M GPIO
193                 })
194         }
196         Device (RTC)    // Real Time Clock
197         {
198                 Name (_HID, EISAID("PNP0B00"))
199                 Name (_CRS, ResourceTemplate()
200                 {
201                         IO (Decode16, 0x70, 0x70, 1, 8)
202 // Disable as Windows doesn't like it, and systems don't seem to use it.
203 //                      IRQNoFlags() { 8 }
204                 })
205         }
207         Device (TIMR)   // Intel 8254 timer
208         {
209                 Name(_HID, EISAID("PNP0100"))
210                 Name(_CRS, ResourceTemplate()
211                 {
212                         IO (Decode16, 0x40, 0x40, 0x01, 0x04)
213                         IO (Decode16, 0x50, 0x50, 0x10, 0x04)
214                         IRQNoFlags() {0}
215                 })
216         }
218         #include "acpi/superio.asl"