src/southbridge/amd/pi/hudson/reset.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2010 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 // Use simple device model for this file even in ramstage
  17 #define __SIMPLE_DEVICE__
  18
  19 #include <arch/io.h>
  20 #include <reset.h>
  21
  22 #include <northbridge/amd/amdk8/reset_test.c>
  23
  24 void hard_reset(void)
  25 {
  26         set_bios_reset();
  27         /* Try rebooting through port 0xcf9 */
  28         /* Actually it is not a real hard_reset --- it only reset coherent link table, but not reset link freq and width */
  29         outb((0 << 3) | (0 << 2) | (1 << 1), 0xcf9);
  30         outb((0 << 3) | (1 << 2) | (1 << 1), 0xcf9);
  31 }