src/southbridge/amd/cs5536/chip.h

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #ifndef _SOUTHBRIDGE_AMD_CS5536
  18 #define _SOUTHBRIDGE_AMD_CS5536
  19
  20 #define MAX_UNWANTED_VPCI 8     /* increase if needed */
  21
  22 struct southbridge_amd_cs5536_config {
  23         unsigned int lpc_serirq_enable; /* interrupt enables for LPC bus; each bit is an irq 0-15 */
  24         unsigned int lpc_serirq_polarity;       /* LPC IRQ polarity; each bit is an irq 0-15 */
  25         unsigned char lpc_serirq_mode;  /* 0:Continuous 1:Quiet */
  26         unsigned int enable_gpio_int_route;     /* GPIO(0-0x20) for INT D:C:B:A, 0xFF=none. See virtual pci spec... */
  27         unsigned char enable_ide_nand_flash;    /* 0:IDE 1:FLASH, if you are using nand flash instead of IDE drive */
  28         unsigned char enable_USBP4_device;      /* Enable USB Port 4 0:host 1:device */
  29         unsigned int enable_USBP4_overcurrent;  /* 0:off, xxxx:overcurrent setting, e.g. 0x3FEA CS5536 - Data Book (pages 380-381) */
  30         unsigned char com1_enable;      /* enable COM1 */
  31         unsigned int com1_address;      /* e.g. 0x3F8 */
  32         unsigned int com1_irq;  /* e.g. 4 */
  33         unsigned char com2_enable;      /* enable COM2 */
  34         unsigned int com2_address;      /* e.g. 0x2F8 */
  35         unsigned int com2_irq;  /* e.g. 3 */
  36         unsigned int unwanted_vpci[MAX_UNWANTED_VPCI];  /* the following allow you to disable unwanted virtualized PCI devices */
  37 };
  38
  39 #endif /* _SOUTHBRIDGE_AMD_CS5536 */