src/southbridge/amd/cimx/sb900/sb_cimx.h

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2011 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16
  17 #ifndef _CIMX_SB_EARLY_H_
  18 #define _CIMX_SB_EARLY_H_
  19
  20 #define PM_INDEX        0xcd6
  21 #define PM_DATA         0xcd7
  22
  23 #define SB900_ACPI_IO_BASE 0x800
  24
  25 #define ACPI_PM_EVT_BLK         (SB900_ACPI_IO_BASE + 0x00) /* 4 bytes */
  26 #define ACPI_PM1_CNT_BLK        (SB900_ACPI_IO_BASE + 0x04) /* 2 bytes */
  27 #define ACPI_PMA_CNT_BLK        (SB900_ACPI_IO_BASE + 0x0F) /* 1 byte */
  28 #define ACPI_PM_TMR_BLK         (SB900_ACPI_IO_BASE + 0x08) /* 4 bytes */
  29 #define ACPI_GPE0_BLK           (SB900_ACPI_IO_BASE + 0x20) /* 8 bytes */
  30 #define ACPI_CPU_CONTROL        (SB900_ACPI_IO_BASE + 0x10) /* 6 bytes */
  31
  32 #define REV_SB900_A11   0x11
  33 #define REV_SB900_A12   0x12
  34
  35 /**
  36  * @brief Get SouthBridge device number, called by finalize_node_setup()
  37  * @param[in] bus target bus number
  38  * @return southbridge device number
  39  */
  40 u32 get_sbdn(u32 bus);
  41
  42 /**
  43  * South Bridge CIMx romstage entry, sbPowerOnInit entry point wrapper.
  44  */
  45 void sb_poweron_init(void);
  46 void sb_before_pci_init(void);
  47
  48 void sb_After_Pci_Init (void);
  49 void sb_Mid_Post_Init (void);
  50 void sb_Late_Post (void);
  51
  52 #endif