src/southbridge/amd/cimx/sb800/fan.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2012 Sage Electronic Engineering, LLC
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <southbridge/amd/cimx/cimx_util.h>
  17 #include <device/device.h>      /* device_t */
  18 #include <device/pci.h>         /* device_operations */
  19 #include "SBPLATFORM.h"
  20 #include "sb_cimx.h"
  21 #include "chip.h"               /* struct southbridge_amd_cimx_sb800_config */
  22 #include "fan.h"
  23
  24 void init_sb800_MANUAL_fans(device_t dev)
  25 {
  26         int i;
  27         struct southbridge_amd_cimx_sb800_config *sb_chip =
  28                 (struct southbridge_amd_cimx_sb800_config *)(dev->chip_info);
  29
  30         /* Init Fan 0 */
  31         if (sb_chip->fan0_enabled)
  32                 for (i = 0; i < FAN_REGISTER_COUNT; i++)
  33                         pm2_iowrite(FAN_0_OFFSET + i, sb_chip->fan0_config_vals[i]);
  34
  35         /* Init Fan 1 */
  36         if (sb_chip->fan1_enabled)
  37                 for (i = 0; i < FAN_REGISTER_COUNT; i++)
  38                         pm2_iowrite(FAN_1_OFFSET + i, sb_chip->fan1_config_vals[i]);
  39
  40         /* Init Fan 2 */
  41         if (sb_chip->fan2_enabled)
  42                 for (i = 0; i < FAN_REGISTER_COUNT; i++)
  43                         pm2_iowrite(FAN_2_OFFSET + i, sb_chip->fan2_config_vals[i]);
  44
  45         /* Init Fan 3 */
  46         if (sb_chip->fan3_enabled)
  47                 for (i = 0; i < FAN_REGISTER_COUNT; i++)
  48                         pm2_iowrite(FAN_3_OFFSET + i, sb_chip->fan3_config_vals[i]);
  49
  50         /* Init Fan 4 */
  51         if (sb_chip->fan4_enabled)
  52                 for (i = 0; i < FAN_REGISTER_COUNT; i++)
  53                         pm2_iowrite(FAN_4_OFFSET + i, sb_chip->fan4_config_vals[i]);
  54
  55 }
  56
  57 void init_sb800_IMC_fans(device_t dev)
  58 {
  59
  60         AMDSBCFG sb_config;
  61         unsigned char *message_ptr;
  62         int i;
  63         struct southbridge_amd_cimx_sb800_config *sb_chip =
  64                 (struct southbridge_amd_cimx_sb800_config *)(dev->chip_info);
  65
  66         /*
  67          * The default I/O address of the IMC configuration register index
  68          *  port is 0x6E. Change the IMC Config port I/O Address if it
  69          *  conflicts with other components in the system.
  70          *
  71          * Device 20, Function 3, Reg 0xA4
  72          * [0]: if 1, the address specified in IMC_PortAddress is used.
  73          * [15:1] IMC_PortAddress bits 15:1 (0x17 - address 0x2E )
  74          */
  75
  76         pci_write_config16(dev, 0xA4, sb_chip->imc_port_address | 0x01);
  77
  78
  79         /*
  80          * Do an initial manual setup of the fans for things like polarity
  81          * and frequency.
  82          */
  83         init_sb800_MANUAL_fans(dev);
  84
  85         /*
  86          * FLAG for Func 81/83/85/89 support (1=On,0=Off)
  87          * Bit0-3   = Func 81 Zone0-Zone3
  88          * Bit4-7   = Func 83 Zone0-Zone3
  89          * Bit8-11  = Func 85 Zone0-Zone3
  90          * Bit12-15 = Func 89 Tempin Channel0-Channel3
  91          */
  92         sb_config.Pecstruct.IMCFUNSupportBitMap = 0;
  93
  94 /*
  95  ********** Zone 0 **********
  96  */
  97 if (sb_chip->imc_fan_zone0_enabled) {
  98
  99         sb_config.Pecstruct.IMCFUNSupportBitMap |= IMC_ENABLE_ZONE0;
 100
 101         /* EC LDN9 function 81 zone 0 */
 102         sb_config.Pecstruct.MSGFun81zone0MSGREG0 = 0x00;
 103         sb_config.Pecstruct.MSGFun81zone0MSGREG1 = IMC_ZONE0;
 104         message_ptr = &sb_config.Pecstruct.MSGFun81zone0MSGREG2;
 105         for (i = 0; i < IMC_FAN_CONFIG_COUNT ; i++ )
 106                 *(message_ptr + i) = sb_chip->imc_zone0_config_vals[i];
 107
 108         /* EC LDN9 function 83 zone 0 - Temperature Thresholds */
 109         sb_config.Pecstruct.MSGFun83zone0MSGREG0 = 0x00;
 110         sb_config.Pecstruct.MSGFun83zone0MSGREG1 = IMC_ZONE0;
 111         sb_config.Pecstruct.MSGFun83zone0MSGREGB = 0x00;
 112         message_ptr = &sb_config.Pecstruct.MSGFun83zone0MSGREG2;
 113         for (i = 0; i < IMC_FAN_THRESHOLD_COUNT ; i++ )
 114                 *(message_ptr + i) = sb_chip->imc_zone0_thresholds[i];
 115
 116         /*EC LDN9 function 85 zone 0 - Fan Speeds */
 117         sb_config.Pecstruct.MSGFun85zone0MSGREG0 = 0x00;
 118         sb_config.Pecstruct.MSGFun85zone0MSGREG1 = IMC_ZONE0;
 119         message_ptr = &sb_config.Pecstruct.MSGFun85zone0MSGREG2;
 120         for (i = 0; i < IMC_FAN_SPEED_COUNT ; i++ )
 121                 *(message_ptr + i) = sb_chip->imc_zone0_fanspeeds[i];
 122
 123 }
 124
 125 /*
 126  ********** Zone 1 **********
 127  */
 128 if (sb_chip->imc_fan_zone1_enabled) {
 129
 130         sb_config.Pecstruct.IMCFUNSupportBitMap |= IMC_ENABLE_ZONE1;
 131
 132         /* EC LDN9 function 81 zone 1 */
 133         sb_config.Pecstruct.MSGFun81zone1MSGREG0 = 0x00;
 134         sb_config.Pecstruct.MSGFun81zone1MSGREG1 = IMC_ZONE1;
 135         message_ptr = &sb_config.Pecstruct.MSGFun81zone1MSGREG2;
 136         for (i = 0; i < IMC_FAN_CONFIG_COUNT ; i++ )
 137                 *(message_ptr + i) = sb_chip->imc_zone1_config_vals[i];
 138
 139         /* EC LDN9 function 83 zone 1 - Temperature Thresholds */
 140         sb_config.Pecstruct.MSGFun83zone1MSGREG0 = 0x00;
 141         sb_config.Pecstruct.MSGFun83zone1MSGREG1 = IMC_ZONE1;
 142         sb_config.Pecstruct.MSGFun83zone1MSGREGB = 0x00;
 143         message_ptr = &sb_config.Pecstruct.MSGFun83zone1MSGREG2;
 144         for (i = 0; i < IMC_FAN_THRESHOLD_COUNT ; i++ )
 145                 *(message_ptr + i) = sb_chip->imc_zone1_thresholds[i];
 146
 147         /* EC LDN9 function 85 zone 1 - Fan Speeds */
 148         sb_config.Pecstruct.MSGFun85zone1MSGREG0 = 0x00;
 149         sb_config.Pecstruct.MSGFun85zone1MSGREG1 = IMC_ZONE1;
 150         message_ptr = &sb_config.Pecstruct.MSGFun85zone1MSGREG2;
 151         for (i = 0; i < IMC_FAN_SPEED_COUNT ; i++ )
 152                 *(message_ptr + i) = sb_chip->imc_zone1_fanspeeds[i];
 153
 154 }
 155
 156
 157 /*
 158  ********** Zone 2 **********
 159  */
 160 if (sb_chip->imc_fan_zone2_enabled) {
 161
 162         sb_config.Pecstruct.IMCFUNSupportBitMap |= IMC_ENABLE_ZONE2;
 163
 164         /* EC LDN9 function 81 zone 2 */
 165         sb_config.Pecstruct.MSGFun81zone2MSGREG0 = 0x00;
 166         sb_config.Pecstruct.MSGFun81zone2MSGREG1 = IMC_ZONE2;
 167         message_ptr = &sb_config.Pecstruct.MSGFun81zone2MSGREG2;
 168         for (i = 0; i < IMC_FAN_CONFIG_COUNT ; i++ )
 169                 *(message_ptr + i) = sb_chip->imc_zone2_config_vals[i];
 170
 171         /* EC LDN9 function 83 zone 2 */
 172         sb_config.Pecstruct.MSGFun83zone2MSGREG0 = 0x00;
 173         sb_config.Pecstruct.MSGFun83zone2MSGREG1 = IMC_ZONE2;
 174         sb_config.Pecstruct.MSGFun83zone2MSGREGB = 0x00;
 175         message_ptr = &sb_config.Pecstruct.MSGFun83zone2MSGREG2;
 176         for (i = 0; i < IMC_FAN_THRESHOLD_COUNT ; i++ )
 177                 *(message_ptr + i) = sb_chip->imc_zone2_thresholds[i];
 178
 179         /* EC LDN9 function 85 zone 2 */
 180         sb_config.Pecstruct.MSGFun85zone2MSGREG0 = 0x00;
 181         sb_config.Pecstruct.MSGFun85zone2MSGREG1 = IMC_ZONE2;
 182         message_ptr = &sb_config.Pecstruct.MSGFun85zone2MSGREG2;
 183         for (i = 0; i < IMC_FAN_SPEED_COUNT ; i++ )
 184                 *(message_ptr + i) = sb_chip->imc_zone2_fanspeeds[i];
 185
 186 }
 187
 188 /*
 189  ********** Zone 3 **********
 190  */
 191
 192 if (sb_chip->imc_fan_zone3_enabled) {
 193
 194         sb_config.Pecstruct.IMCFUNSupportBitMap |= IMC_ENABLE_ZONE3;
 195
 196         /* EC LDN9 function 81 zone 3 */
 197         sb_config.Pecstruct.MSGFun81zone3MSGREG0 = 0x00;
 198         sb_config.Pecstruct.MSGFun81zone3MSGREG1 = IMC_ZONE3;
 199         message_ptr = &sb_config.Pecstruct.MSGFun81zone3MSGREG2;
 200         for (i = 0; i < IMC_FAN_CONFIG_COUNT ; i++ )
 201                 *(message_ptr + i) = sb_chip->imc_zone3_config_vals[i];
 202
 203         /* EC LDN9 function 83 zone 3 */
 204         sb_config.Pecstruct.MSGFun83zone3MSGREG0 = 0x00;
 205         sb_config.Pecstruct.MSGFun83zone3MSGREG1 = IMC_ZONE3;
 206         sb_config.Pecstruct.MSGFun83zone3MSGREGB = 0x00;
 207         message_ptr = &sb_config.Pecstruct.MSGFun83zone3MSGREG2;
 208         for (i = 0; i < IMC_FAN_THRESHOLD_COUNT ; i++ )
 209                 *(message_ptr + i) = sb_chip->imc_zone3_thresholds[i];
 210
 211         /* EC LDN9 function 85 zone 3 */
 212         sb_config.Pecstruct.MSGFun85zone3MSGREG0 = 0x00;
 213         sb_config.Pecstruct.MSGFun85zone3MSGREG1 = IMC_ZONE3;
 214         message_ptr = &sb_config.Pecstruct.MSGFun85zone3MSGREG2;
 215         for (i = 0; i < IMC_FAN_SPEED_COUNT ; i++ )
 216                 *(message_ptr + i) = sb_chip->imc_zone3_fanspeeds[i];
 217
 218 }
 219
 220         /*
 221          * EC LDN9 function 89 - Set HWM TEMPIN Temperature Calculation Parameters
 222          * This function provides the critical parameters of the HWM TempIn
 223          * sensors, IMC would not perform temperature measurement using those
 224          * sensors until the parameters are provided.
 225          */
 226
 227 if (sb_chip->imc_tempin0_enabled) {
 228
 229         sb_config.Pecstruct.IMCFUNSupportBitMap |= IMC_ENABLE_TEMPIN0;
 230
 231         /* EC LDN9 function 89 TEMPIN channel 0 */
 232         sb_config.Pecstruct.MSGFun89zone0MSGREG0 = 0x00;
 233         sb_config.Pecstruct.MSGFun89zone0MSGREG1 = 0x00;
 234         sb_config.Pecstruct.MSGFun89zone0MSGREG2 = ( sb_chip->imc_tempin0_at & 0xff);
 235         sb_config.Pecstruct.MSGFun89zone0MSGREG3 = ((sb_chip->imc_tempin0_at >> 8)  & 0xff);
 236         sb_config.Pecstruct.MSGFun89zone0MSGREG4 = ((sb_chip->imc_tempin0_at >> 16) & 0xff);
 237         sb_config.Pecstruct.MSGFun89zone0MSGREG5 = ((sb_chip->imc_tempin0_at >> 24) & 0xff);
 238         sb_config.Pecstruct.MSGFun89zone0MSGREG6 = ( sb_chip->imc_tempin0_ct & 0xff);
 239         sb_config.Pecstruct.MSGFun89zone0MSGREG7 = ((sb_chip->imc_tempin0_ct >> 8)  & 0xff);
 240         sb_config.Pecstruct.MSGFun89zone0MSGREG8 = ((sb_chip->imc_tempin0_ct >> 16)  & 0xff);
 241         sb_config.Pecstruct.MSGFun89zone0MSGREG9 = ((sb_chip->imc_tempin0_ct >> 24)  & 0xff);
 242         sb_config.Pecstruct.MSGFun89zone0MSGREGA = sb_chip->imc_tempin0_tuning_param;
 243 }
 244
 245 if (sb_chip->imc_tempin1_enabled) {
 246
 247         sb_config.Pecstruct.IMCFUNSupportBitMap |= IMC_ENABLE_TEMPIN1;
 248
 249         /* EC LDN9 function 89 TEMPIN channel 1 */
 250         sb_config.Pecstruct.MSGFun89zone1MSGREG0 = 0x00;
 251         sb_config.Pecstruct.MSGFun89zone1MSGREG1 = 0x01;
 252         sb_config.Pecstruct.MSGFun89zone1MSGREG2 = ( sb_chip->imc_tempin1_at & 0xff);
 253         sb_config.Pecstruct.MSGFun89zone1MSGREG3 = ((sb_chip->imc_tempin1_at >> 8)  & 0xff);
 254         sb_config.Pecstruct.MSGFun89zone1MSGREG4 = ((sb_chip->imc_tempin1_at >> 16) & 0xff);
 255         sb_config.Pecstruct.MSGFun89zone1MSGREG5 = ((sb_chip->imc_tempin1_at >> 24) & 0xff);
 256         sb_config.Pecstruct.MSGFun89zone1MSGREG6 = ( sb_chip->imc_tempin1_ct & 0xff);
 257         sb_config.Pecstruct.MSGFun89zone1MSGREG7 = ((sb_chip->imc_tempin1_ct >> 8)  & 0xff);
 258         sb_config.Pecstruct.MSGFun89zone1MSGREG8 = ((sb_chip->imc_tempin1_ct >> 16)  & 0xff);
 259         sb_config.Pecstruct.MSGFun89zone1MSGREG9 = ((sb_chip->imc_tempin1_ct >> 24)  & 0xff);
 260         sb_config.Pecstruct.MSGFun89zone1MSGREGA = sb_chip->imc_tempin1_tuning_param;
 261 }
 262
 263 if (sb_chip->imc_tempin2_enabled) {
 264
 265         sb_config.Pecstruct.IMCFUNSupportBitMap |= IMC_ENABLE_TEMPIN2;
 266
 267         /* EC LDN9 function 89 TEMPIN channel 2 */
 268         sb_config.Pecstruct.MSGFun89zone2MSGREG0 = 0x00;
 269         sb_config.Pecstruct.MSGFun89zone2MSGREG1 = 0x02;
 270         sb_config.Pecstruct.MSGFun89zone2MSGREG2 = ( sb_chip->imc_tempin2_at & 0xff);
 271         sb_config.Pecstruct.MSGFun89zone2MSGREG3 = ((sb_chip->imc_tempin2_at >> 8)  & 0xff);
 272         sb_config.Pecstruct.MSGFun89zone2MSGREG4 = ((sb_chip->imc_tempin2_at >> 16) & 0xff);
 273         sb_config.Pecstruct.MSGFun89zone2MSGREG5 = ((sb_chip->imc_tempin2_at >> 24) & 0xff);
 274         sb_config.Pecstruct.MSGFun89zone2MSGREG6 = ( sb_chip->imc_tempin2_ct & 0xff);
 275         sb_config.Pecstruct.MSGFun89zone2MSGREG7 = ((sb_chip->imc_tempin2_ct >> 8)  & 0xff);
 276         sb_config.Pecstruct.MSGFun89zone2MSGREG8 = ((sb_chip->imc_tempin2_ct >> 16)  & 0xff);
 277         sb_config.Pecstruct.MSGFun89zone2MSGREG9 = ((sb_chip->imc_tempin2_ct >> 24)  & 0xff);
 278         sb_config.Pecstruct.MSGFun89zone2MSGREGA = sb_chip->imc_tempin2_tuning_param;
 279 }
 280
 281 if (sb_chip->imc_tempin3_enabled) {
 282
 283         sb_config.Pecstruct.IMCFUNSupportBitMap |= IMC_ENABLE_TEMPIN3;
 284
 285         /* EC LDN9 function 89 TEMPIN channel 3 */
 286         sb_config.Pecstruct.MSGFun89zone3MSGREG0 = 0x00;
 287         sb_config.Pecstruct.MSGFun89zone3MSGREG1 = 0x03;
 288         sb_config.Pecstruct.MSGFun89zone3MSGREG2 = ( sb_chip->imc_tempin3_at & 0xff);
 289         sb_config.Pecstruct.MSGFun89zone3MSGREG3 = ((sb_chip->imc_tempin3_at >> 8)  & 0xff);
 290         sb_config.Pecstruct.MSGFun89zone3MSGREG4 = ((sb_chip->imc_tempin3_at >> 16) & 0xff);
 291         sb_config.Pecstruct.MSGFun89zone3MSGREG5 = ((sb_chip->imc_tempin3_at >> 24) & 0xff);
 292         sb_config.Pecstruct.MSGFun89zone3MSGREG6 = ( sb_chip->imc_tempin3_ct & 0xff);
 293         sb_config.Pecstruct.MSGFun89zone3MSGREG7 = ((sb_chip->imc_tempin3_ct >> 8)  & 0xff);
 294         sb_config.Pecstruct.MSGFun89zone3MSGREG8 = ((sb_chip->imc_tempin3_ct >> 16)  & 0xff);
 295         sb_config.Pecstruct.MSGFun89zone3MSGREG9 = ((sb_chip->imc_tempin3_ct >> 24)  & 0xff);
 296         sb_config.Pecstruct.MSGFun89zone3MSGREGA = sb_chip->imc_tempin3_tuning_param;
 297 }
 298
 299         /* Set up the sb_config structure for the fan control initialization */
 300         sb_config.StdHeader.Func = SB_EC_FANCONTROL;
 301
 302         AmdSbDispatcher(&sb_config);
 303
 304         return;
 305 }