src/southbridge/amd/cimx/sb700/smbus.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2012 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16
  17 #include <arch/io.h>
  18 #include "smbus.h"
  19 #include <console/console.h>    /* printk */
  20
  21 static int smbus_wait_until_ready(u32 smbus_io_base)
  22 {
  23         u32 loops;
  24
  25         loops = SMBUS_TIMEOUT;
  26         do {
  27                 u8 val;
  28                 val = inb(smbus_io_base + SMBHSTSTAT);
  29                 val &= 0x1f;
  30                 if (val == 0) { /* ready now */
  31                         return 0;
  32                 }
  33                 outb(val, smbus_io_base + SMBHSTSTAT);
  34         } while (--loops);
  35
  36         return -2;              /* time out */
  37 }
  38
  39 static int smbus_wait_until_done(u32 smbus_io_base)
  40 {
  41         u32 loops;
  42
  43         loops = SMBUS_TIMEOUT;
  44         do {
  45                 u8 val;
  46
  47                 val = inb(smbus_io_base + SMBHSTSTAT);
  48                 val &= 0x1f;    /* mask off reserved bits */
  49                 if (val & 0x1c) {
  50                         return -5;      /* error */
  51                 }
  52                 if (val == 0x02) {
  53                         outb(val, smbus_io_base + SMBHSTSTAT);  /* clear status */
  54                         return 0;
  55                 }
  56         } while (--loops);
  57
  58         return -3;              /* timeout */
  59 }
  60
  61 int do_smbus_recv_byte(u32 smbus_io_base, u32 device)
  62 {
  63         u8 byte;
  64
  65         if (smbus_wait_until_ready(smbus_io_base) < 0) {
  66                 return -2;      /* not ready */
  67         }
  68
  69         printk(BIOS_SPEW, "SB700 - Smbus.c - do_smbus_recv_byte - Start.\n");
  70         /* set the device I'm talking too */
  71         outb(((device & 0x7f) << 1) | 1, smbus_io_base + SMBHSTADDR);
  72
  73         byte = inb(smbus_io_base + SMBHSTCTRL);
  74         byte &= 0xe3;           /* Clear [4:2] */
  75         byte |= (1 << 2) | (1 << 6);    /* Byte data read/write command, start the command */
  76         outb(byte, smbus_io_base + SMBHSTCTRL);
  77
  78         /* poll for transaction completion */
  79         if (smbus_wait_until_done(smbus_io_base) < 0) {
  80                 return -3;      /* timeout or error */
  81         }
  82
  83         /* read results of transaction */
  84         byte = inb(smbus_io_base + SMBHSTCMD);
  85
  86         printk(BIOS_SPEW, "SB700 - Smbus.c - do_smbus_recv_byte - End.\n");
  87         return byte;
  88 }
  89
  90 int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val)
  91 {
  92         u8 byte;
  93
  94         if (smbus_wait_until_ready(smbus_io_base) < 0) {
  95                 return -2;      /* not ready */
  96         }
  97
  98         printk(BIOS_SPEW, "SB700 - Smbus.c - do_smbus_send_byte - Start.\n");
  99         /* set the command... */
 100         outb(val, smbus_io_base + SMBHSTCMD);
 101
 102         /* set the device I'm talking too */
 103         outb(((device & 0x7f) << 1) | 0, smbus_io_base + SMBHSTADDR);
 104
 105         byte = inb(smbus_io_base + SMBHSTCTRL);
 106         byte &= 0xe3;           /* Clear [4:2] */
 107         byte |= (1 << 2) | (1 << 6);    /* Byte data read/write command, start the command */
 108         outb(byte, smbus_io_base + SMBHSTCTRL);
 109
 110         /* poll for transaction completion */
 111         if (smbus_wait_until_done(smbus_io_base) < 0) {
 112                 return -3;      /* timeout or error */
 113         }
 114
 115         printk(BIOS_SPEW, "SB700 - Smbus.c - do_smbus_send_byte - End.\n");
 116         return 0;
 117 }
 118
 119 int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address)
 120 {
 121         u8 byte;
 122
 123         if (smbus_wait_until_ready(smbus_io_base) < 0) {
 124                 return -2;      /* not ready */
 125         }
 126
 127         printk(BIOS_SPEW, "SB700 - Smbus.c - do_smbus_read_byte - Start.\n");
 128         /* set the command/address... */
 129         outb(address & 0xff, smbus_io_base + SMBHSTCMD);
 130
 131         /* set the device I'm talking too */
 132         outb(((device & 0x7f) << 1) | 1, smbus_io_base + SMBHSTADDR);
 133
 134         byte = inb(smbus_io_base + SMBHSTCTRL);
 135         byte &= 0xe3;           /* Clear [4:2] */
 136         byte |= (1 << 3) | (1 << 6);    /* Byte data read/write command, start the command */
 137         outb(byte, smbus_io_base + SMBHSTCTRL);
 138
 139         /* poll for transaction completion */
 140         if (smbus_wait_until_done(smbus_io_base) < 0) {
 141                 return -3;      /* timeout or error */
 142         }
 143
 144         /* read results of transaction */
 145         byte = inb(smbus_io_base + SMBHSTDAT0);
 146
 147         printk(BIOS_SPEW, "SB700 - Smbus.c - do_smbus_read_byte - End.\n");
 148         return byte;
 149 }
 150
 151 int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val)
 152 {
 153         u8 byte;
 154
 155         if (smbus_wait_until_ready(smbus_io_base) < 0) {
 156                 return -2;      /* not ready */
 157         }
 158
 159         printk(BIOS_SPEW, "SB700 - Smbus.c - do_smbus_write_byte - Start.\n");
 160         /* set the command/address... */
 161         outb(address & 0xff, smbus_io_base + SMBHSTCMD);
 162
 163         /* set the device I'm talking too */
 164         outb(((device & 0x7f) << 1) | 0, smbus_io_base + SMBHSTADDR);
 165
 166         /* output value */
 167         outb(val, smbus_io_base + SMBHSTDAT0);
 168
 169         byte = inb(smbus_io_base + SMBHSTCTRL);
 170         byte &= 0xe3;           /* Clear [4:2] */
 171         byte |= (1 << 3) | (1 << 6);    /* Byte data read/write command, start the command */
 172         outb(byte, smbus_io_base + SMBHSTCTRL);
 173
 174         /* poll for transaction completion */
 175         if (smbus_wait_until_done(smbus_io_base) < 0) {
 176                 return -3;      /* timeout or error */
 177         }
 178
 179         printk(BIOS_SPEW, "SB700 - Smbus.c - do_smbus_write_byte - End.\n");
 180         return 0;
 181 }
 182
 183 void alink_ab_indx(u32 reg_space, u32 reg_addr, u32 mask, u32 val)
 184 {
 185         u32 tmp;
 186
 187         printk(BIOS_SPEW, "SB700 - Smbus.c - alink_ab_indx - Start.\n");
 188         outl((reg_space & 0x7) << 29 | reg_addr, AB_INDX);
 189         tmp = inl(AB_DATA);
 190         /* rpr 4.2
 191          * For certain revisions of the chip, the ABCFG registers,
 192          * with an address of 0x100NN (where 'N' is any hexadecimal
 193          * number), require an extra programming step.*/
 194         outl(0, AB_INDX);
 195
 196         tmp &= ~mask;
 197         tmp |= val;
 198
 199         /* printk(BIOS_DEBUG, "about write %x, index=%x", tmp, (reg_space&0x3)<<29 | reg_addr); */
 200         outl((reg_space & 0x7) << 29 | reg_addr, AB_INDX);      /* probably we don't have to do it again. */
 201         outl(tmp, AB_DATA);
 202         outl(0, AB_INDX);
 203         printk(BIOS_SPEW, "SB700 - Smbus.c - alink_ab_indx - End.\n");
 204 }
 205
 206 void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, u32 mask, u32 val)
 207 {
 208         u32 tmp;
 209
 210         printk(BIOS_SPEW, "SB700 - Smbus.c - alink_rc_indx - Start.\n");
 211         outl((reg_space & 0x7) << 29 | (port & 3) << 24 | reg_addr, AB_INDX);
 212         tmp = inl(AB_DATA);
 213         /* rpr 4.2
 214          * For certain revisions of the chip, the ABCFG registers,
 215          * with an address of 0x100NN (where 'N' is any hexadecimal
 216          * number), require an extra programming step.*/
 217         outl(0, AB_INDX);
 218
 219         tmp &= ~mask;
 220         tmp |= val;
 221
 222         //printk(BIOS_DEBUG, "about write %x, index=%x", tmp, (reg_space&0x3)<<29 | (port&3) << 24 | reg_addr);
 223         outl((reg_space & 0x7) << 29 | (port & 3) << 24 | reg_addr, AB_INDX);   /* probably we don't have to do it again. */
 224         outl(tmp, AB_DATA);
 225         outl(0, AB_INDX);
 226         printk(BIOS_SPEW, "SB700 - Smbus.c - alink_rc_indx - End.\n");
 227 }
 228
 229 /* space = 0: AX_INDXC, AX_DATAC
 230  * space = 1: AX_INDXP, AX_DATAP
 231  */
 232 void alink_ax_indx(u32 space /*c or p? */ , u32 axindc, u32 mask, u32 val)
 233 {
 234         u32 tmp;
 235
 236         printk(BIOS_SPEW, "SB700 - Smbus.c - alink_ax_indx - Start.\n");
 237         /* read axindc to tmp */
 238         outl(space << 29 | space << 3 | 0x30, AB_INDX);
 239         outl(axindc, AB_DATA);
 240         outl(0, AB_INDX);
 241         outl(space << 29 | space << 3 | 0x34, AB_INDX);
 242         tmp = inl(AB_DATA);
 243         outl(0, AB_INDX);
 244
 245         tmp &= ~mask;
 246         tmp |= val;
 247
 248         /* write tmp */
 249         outl(space << 29 | space << 3 | 0x30, AB_INDX);
 250         outl(axindc, AB_DATA);
 251         outl(0, AB_INDX);
 252         outl(space << 29 | space << 3 | 0x34, AB_INDX);
 253         outl(tmp, AB_DATA);
 254         outl(0, AB_INDX);
 255         printk(BIOS_SPEW, "SB700 - Smbus.c - alink_ax_indx - End.\n");
 256 }