tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / soc / samsung / exynos5250 / power.c
bloba168355f14475c3433943e90820d600132a8ab9e
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2012 Samsung Electronics
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 /* Power setup code for EXYNOS5 */
18 #include <arch/io.h>
19 #include <console/console.h>
20 #include <halt.h>
21 #include <soc/dmc.h>
22 #include <soc/power.h>
23 #include <soc/setup.h>
25 /* Set the PS-Hold drive value */
26 static void ps_hold_setup(void)
28 /* Set PS-Hold high */
29 setbits_le32(&exynos_power->ps_hold_ctrl,
30 POWER_PS_HOLD_CONTROL_DATA_HIGH);
33 void power_reset(void)
35 /* Clear inform1 so there's no change we think we've got a wake reset */
36 exynos_power->inform1 = 0;
38 setbits_le32(&exynos_power->sw_reset, 1);
41 /* This function never returns */
42 void power_shutdown(void)
44 clrbits_le32(&exynos_power->ps_hold_ctrl,
45 POWER_PS_HOLD_CONTROL_DATA_HIGH);
47 halt();
50 void power_enable_dp_phy(void)
52 setbits_le32(&exynos_power->dptx_phy_control, EXYNOS_DP_PHY_ENABLE);
55 void power_enable_hw_thermal_trip(void)
57 /* Enable HW thermal trip */
58 setbits_le32(&exynos_power->ps_hold_ctrl, POWER_ENABLE_HW_TRIP);
61 uint32_t power_read_reset_status(void)
63 return exynos_power->inform1;
66 void power_exit_wakeup(void)
68 typedef void (*resume_func)(void);
70 ((resume_func)exynos_power->inform0)();
73 int power_init(void)
75 ps_hold_setup();
76 return 0;
79 void power_enable_xclkout(void)
81 /* use xxti for xclk out */
82 clrsetbits_le32(&exynos_power->pmu_debug, PMU_DEBUG_CLKOUT_SEL_MASK,
83 PMU_DEBUG_XXTI);
86 void power_release_uart_retention(void)
88 write32(&exynos_power->padret_uart_opt, 1 << 28);