tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / soc / nvidia / tegra132 / jdi_25x18_display / panel-jdi-lpm102a188a.h
blobf137cdd28c07f1d1090fd894308c540b8260bf22
1 /*
2 * This file is part of the coreboot project.
4 * Copyright 2014 Google Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 #ifndef _PANEL_JDI_LPM102A188A_H_
16 #define _PANEL_JDI_LPM102A188A_H_
18 #define LP8557_MAX_BRIGHTNESS 0xFFF;
20 #define LP8557_COMMAND 0x00
21 #define LP8557_COMMAND_ON (1 << 0)
23 #define LP8557_BRIGHTNESS_LOW 0x03
24 #define LP8557_BRIGHTNESS_LOW_MASK(x) (((x) & 0xF) << 4)
26 #define LP8557_BRIGHTNESS_HIGH 0x04
27 #define LP8557_BRIGHTNESS_HIGH_MASK(x) (((x) & 0xFF0) >> 4)
29 enum lp8557_config_brightness_mode {
30 LP8557_CONFIG_BRTMODE_PWM = 0x0,
31 LP8557_CONFIG_BRTMODE_REG,
32 LP8557_CONFIG_BRTMODE_PWM_REG_SHAPE_PWM,
33 LP8557_CONFIG_BRTMODE_PWM_REG_SHAPE_BRIGHTNESS,
34 LP8557_CONFIG_BRTMODE_MAX,
36 #define LP8557_CONFIG 0x10
37 #define LP8557_CONFIG_BRTMODE(x) (((x) & 0x3) << 0)
38 #define LP8557_CONFIG_AUTO_DETECT_LED (1 << 2)
39 #define LP8557_CONFIG_PWM_STANDBY (1 << 7)
41 enum lp8557_current {
42 LP8557_CURRENT_5_MA = 0x0,
43 LP8557_CURRENT_10_MA,
44 LP8557_CURRENT_13_MA,
45 LP8557_CURRENT_15_MA,
46 LP8557_CURRENT_18_MA,
47 LP8557_CURRENT_20_MA,
48 LP8557_CURRENT_23_MA,
49 LP8557_CURRENT_25_MA,
50 LP8557_CURRENT_MAX,
52 #define LP8557_CURRENT 0x11
53 #define LP8557_CURRENT_MAXCURR(x) (((x) & 0x7) << 0)
54 #define LP8557_CURRENT_ISET (1 << 7)
56 enum lp8557_pgen_frequency {
57 LP8557_PGEN_FREQ_4_9_KHZ = 0x0,
58 LP8557_PGEN_FREQ_9_8_KHZ,
59 LP8557_PGEN_FREQ_14_6_KHZ,
60 LP8557_PGEN_FREQ_19_5_KHZ,
61 LP8557_PGEN_FREQ_24_4_KHZ,
62 LP8557_PGEN_FREQ_29_3_KHZ,
63 LP8557_PGEN_FREQ_34_2_KHZ,
64 LP8557_PGEN_FREQ_39_1_KHZ,
65 LP8557_PGEN_FREQ_MAX,
67 #define LP8557_PGEN 0x12
68 #define LP8557_PGEN_FREQ(x) (((x) & 0x7) << 0)
69 #define LP8557_PGEN_MAGIC (5 << 3)
70 #define LP8557_PGEN_FSET (1 << 7)
72 enum lp8557_boost_freq {
73 LP8557_BOOST_FREQ_500_KHZ = 0x0,
74 LP8557_BOOST_FREQ_1_MHZ,
75 LP8557_BOOST_FREQ_MAX,
77 enum lp8557_boost_bcomp {
78 LP8557_BOOST_BCOMP_OPTION_0 = 0x0,
79 LP8557_BOOST_BCOMP_OPTION_1,
80 LP8557_BOOST_BCOMP_MAX,
82 #define LP8557_BOOST 0x13
83 #define LP8557_BOOST_FREQ(x) (((x) & 0x1) << 0)
84 #define LP8557_BOOST_BCOMP(x) (((x) & 0x1) << 1)
85 #define LP8557_BOOST_BCSET (1 << 6)
86 #define LP8557_BOOST_BFSET (1 << 7)
88 #define LP8557_LED_ENABLE 0x14
89 #define LP8557_LED_ENABLE_SINKS(x) (((x) & 0x3F) << 0)
90 #define LP8557_LED_ENABLE_MAGIC (2 << 6)
92 enum lp8557_step_ramp {
93 LP8557_STEP_RAMP_0_MS = 0x0,
94 LP8557_STEP_RAMP_50_MS,
95 LP8557_STEP_RAMP_100_MS,
96 LP8557_STEP_RAMP_200_MS,
97 LP8557_STEP_RAMP_MAX,
99 enum lp8557_step_smoothing {
100 LP8557_STEP_SMOOTHING_NONE = 0x0,
101 LP8557_STEP_SMOOTHING_LIGHT,
102 LP8557_STEP_SMOOTHING_MEDIUM,
103 LP8557_STEP_SMOOTHING_HEAVY,
104 LP8557_STEP_SMOOTHING_MAX,
106 #define LP8557_STEP 0x15
107 #define LP8557_STEP_RAMP(x) (((x) & 0x3) << 0)
108 #define LP8557_STEP_SMOOTHING(x) (((x) & 0x3) << 6)
110 struct mipi_dsi_device;
111 struct soc_nvidia_tegra132_config;
113 struct panel_jdi {
114 struct mipi_dsi_device *dsi;
115 const struct soc_nvidia_tegra132_config *mode;
117 /* Physical size */
118 unsigned int width_mm;
119 unsigned int height_mm;
121 int enabled;
124 struct panel_jdi *panel_jdi_dsi_probe(struct mipi_dsi_device *dsi);
125 int panel_jdi_prepare(struct panel_jdi *jdi);
127 #endif