src/soc/intel/braswell/memmap.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2013 Google, Inc.
   5  * Copyright (C) 2015 Intel Corp.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied wacbmem_entryanty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <arch/io.h>
  18 #include <cbmem.h>
  19 #include <console/console.h>
  20 #include <fsp/memmap.h>
  21 #include <soc/iosf.h>
  22 #include <soc/smm.h>
  23
  24 static size_t smm_region_size(void)
  25 {
  26         u32 smm_size;
  27         smm_size = iosf_bunit_read(BUNIT_SMRRH) & 0xFFFF;
  28         smm_size -= iosf_bunit_read(BUNIT_SMRRL) & 0xFFFF;
  29         smm_size = (smm_size + 1) << 20;
  30         return smm_size;
  31 }
  32
  33 void smm_region(void **start, size_t *size)
  34 {
  35         *start = (void *)((iosf_bunit_read(BUNIT_SMRRL) & 0xFFFF) << 20);
  36         *size = smm_region_size();
  37 }
  38
  39 size_t mmap_region_granluarity(void)
  40 {
  41         /* Align to TSEG size when SMM is in use, and 8MiB by default */
  42         return IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) ? smm_region_size()
  43                 : 8 << 20;
  44 }
  45
  46 /*
  47  *        Subregions within SMM
  48  *     +-------------------------+ BUNIT_SMRRH
  49  *     |  External Stage Cache   | SMM_RESERVED_SIZE
  50  *     +-------------------------+
  51  *     |      code and data      |
  52  *     |         (TSEG)          |
  53  *     +-------------------------+ BUNIT_SMRRL
  54  */
  55 int smm_subregion(int sub, void **start, size_t *size)
  56 {
  57         uintptr_t sub_base;
  58         void *sub_ptr;
  59         size_t sub_size;
  60         const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
  61
  62         smm_region(&sub_ptr, &sub_size);
  63         sub_base = (uintptr_t)sub_ptr;
  64
  65         switch (sub) {
  66         case SMM_SUBREGION_HANDLER:
  67                 /* Handler starts at the base of TSEG. */
  68                 sub_size -= cache_size;
  69                 break;
  70         case SMM_SUBREGION_CACHE:
  71                 /* External cache is in the middle of TSEG. */
  72                 sub_base += sub_size - cache_size;
  73                 sub_size = cache_size;
  74                 break;
  75         default:
  76                 return -1;
  77         }
  78
  79         *start = (void *)sub_base;
  80         *size = sub_size;
  81
  82         return 0;
  83 }
  84
  85 void *cbmem_top(void)
  86 {
  87         char *smm_base;
  88         size_t smm_size;
  89
  90         /*
  91          *     +-------------------------+  Top of RAM (aligned)
  92          *     | System Management Mode  |
  93          *     |      code and data      |  Length: CONFIG_TSEG_SIZE
  94          *     |         (TSEG)          |
  95          *     +-------------------------+  SMM base (aligned)
  96          *     |                         |
  97          *     | Chipset Reserved Memory |  Length: Multiple of CONFIG_TSEG_SIZE
  98          *     |                         |
  99          *     +-------------------------+  top_of_ram (aligned)
 100          *     |                         |
 101          *     |       CBMEM Root        |
 102          *     |                         |
 103          *     +-------------------------+
 104          *     |                         |
 105          *     |   FSP Reserved Memory   |
 106          *     |                         |
 107          *     +-------------------------+
 108          *     |                         |
 109          *     |  Various CBMEM Entries  |
 110          *     |                         |
 111          *     +-------------------------+  top_of_stack (8 byte aligned)
 112          *     |                         |
 113          *     |   stack (CBMEM Entry)   |
 114          *     |                         |
 115          *     +-------------------------+
 116         */
 117
 118         smm_region((void **)&smm_base, &smm_size);
 119         return (void *)smm_base;
 120 }