src/soc/intel/baytrail/acpi/pcie.asl

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007-2009 coresystems GmbH
   5  * Copyright (C) 2014 Google Inc.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 /* Intel SOC PCIe support */
  18
  19 Device (RP01)
  20 {
  21         Name (_ADR, 0x001c0000)
  22
  23         Method (_PRT)
  24         {
  25                 If (PICM) {
  26                         Return (Package() {
  27                                 #undef PIC_MODE
  28                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  29                                 PCI_DEV_PIRQ_ROUTE(0x0, A, B, C, D)
  30                         })
  31                 } Else {
  32                         Return (Package() {
  33                                 #define PIC_MODE
  34                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  35                                 PCI_DEV_PIRQ_ROUTE(0x0, A, B, C, D)
  36                         })
  37                 }
  38         }
  39 }
  40
  41 Device (RP02)
  42 {
  43         Name (_ADR, 0x001c0001)
  44
  45         Method (_PRT)
  46         {
  47                 If (PICM) {
  48                         Return (Package() {
  49                                 #undef PIC_MODE
  50                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  51                                 PCI_DEV_PIRQ_ROUTE(0x0, B, C, D, A)
  52                         })
  53                 } Else {
  54                         Return (Package() {
  55                                 #define PIC_MODE
  56                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  57                                 PCI_DEV_PIRQ_ROUTE(0x0, B, C, D, A)
  58                         })
  59                 }
  60         }
  61 }
  62
  63 Device (RP03)
  64 {
  65         Name (_ADR, 0x001c0002)
  66
  67         Method (_PRT)
  68         {
  69                 If (PICM) {
  70                         Return (Package() {
  71                                 #undef PIC_MODE
  72                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  73                                 PCI_DEV_PIRQ_ROUTE(0x0, C, D, A, B)
  74                         })
  75                 } Else {
  76                         Return (Package() {
  77                                 #define PIC_MODE
  78                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  79                                 PCI_DEV_PIRQ_ROUTE(0x0, C, D, A, B)
  80                         })
  81                 }
  82         }
  83 }
  84
  85 Device (RP04)
  86 {
  87         Name (_ADR, 0x001c0003)
  88
  89         Method (_PRT)
  90         {
  91                 If (PICM) {
  92                         Return (Package() {
  93                                 #undef PIC_MODE
  94                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  95                                 PCI_DEV_PIRQ_ROUTE(0x0, D, A, B, C)
  96                         })
  97                 } Else {
  98                         Return (Package() {
  99                                 #define PIC_MODE
 100                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
 101                                 PCI_DEV_PIRQ_ROUTE(0x0, D, A, B, C)
 102                         })
 103                 }
 104         }
 105 }