tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / northbridge / via / vx800 / dqs_search.c
blobe34b71077af63cab6beab91c667aba1a3bc3757b
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2009 One Laptop per Child, Association, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 void SetDQSOutputCHA(DRAM_SYS_ATTR * DramAttr);
17 void SetDQSOutputCHB(DRAM_SYS_ATTR * DramAttr);
19 /*===================================================================
20 Function : DRAMDQSOutputSearchCHA()
21 Precondition :
22 Input :
23 DramAttr: pointer point to DRAM_SYS_ATTR which consist the DDR and Dimm information
24 in MotherBoard
25 Output : Void
26 Purpose : set DQS output delay register reg70 and DQ output delay register reg71
27 ===================================================================*/
29 #define CH_A 0
30 #define CH_B 1
31 void DRAMDQSOutputSearch(DRAM_SYS_ATTR * DramAttr)
33 if (DramAttr->RankNumChA > 0)
34 SetDQSOutputCHA(DramAttr);
37 /*===================================================================
38 Function : SetDQSOutputCHA()
39 Precondition :
40 Input :
41 DramAttr: pointer point to DRAM_SYS_ATTR which consist the DDR and Dimm information
42 in MotherBoard
43 Output : Void
44 Purpose : according the frequence set CHA DQS output
45 ===================================================================*/
46 void SetDQSOutputCHA(DRAM_SYS_ATTR * DramAttr)
48 u8 Reg70, Reg71;
49 u8 Index;
51 if (DramAttr->DramFreq == DIMMFREQ_400)
52 Index = 3;
53 else if (DramAttr->DramFreq == DIMMFREQ_533)
54 Index = 2;
55 else if (DramAttr->DramFreq == DIMMFREQ_667)
56 Index = 1;
57 else if (DramAttr->DramFreq == DIMMFREQ_800)
58 Index = 0;
59 else
60 Index = 3;
62 if (DramAttr->RankNumChA > 2) {
63 Reg70 = Fixed_DQSA_3_4_Rank_Table[Index][0];
64 Reg71 = Fixed_DQSA_3_4_Rank_Table[Index][1];
65 } else {
66 Reg70 = Fixed_DQSA_1_2_Rank_Table[Index][0];
67 Reg71 = Fixed_DQSA_1_2_Rank_Table[Index][1];
69 pci_write_config8(MEMCTRL, 0x70, Reg70);
70 pci_write_config8(MEMCTRL, 0x71, Reg71);
73 //################
74 // STEP 12 #
75 //################
77 /*===================================================================
78 Function : DRAMDQSInputSearch()
79 Precondition :
80 Input :
81 DramAttr: pointer point to DRAM_SYS_ATTR which consist the DDR and Dimm information
82 in MotherBoard
83 Output : Void
84 Purpose : search DQS input delay for CHA/CHB
85 ===================================================================*/
87 void DRAMDQSInputSearch(DRAM_SYS_ATTR * DramAttr)
89 u8 Data;
90 //auto mode
91 Data = 0x0;
92 pci_write_config8(MEMCTRL, 0x77, Data);