tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / northbridge / intel / sandybridge / Kconfig
blob3e517b1f0a4c6df010ec3cae6babe1cf637fc608
1 ##
2 ## This file is part of the coreboot project.
3 ##
4 ## Copyright (C) 2010 Google Inc.
5 ##
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; version 2 of the License.
9 ##
10 ## This program is distributed in the hope that it will be useful,
11 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
12 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 ## GNU General Public License for more details.
16 config NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC
17         bool
18         select MMCONF_SUPPORT
19         select MMCONF_SUPPORT_DEFAULT
20         select CPU_INTEL_MODEL_206AX
21         select INTEL_GMA_ACPI
23 config NORTHBRIDGE_INTEL_SANDYBRIDGE
24         bool
25         select MMCONF_SUPPORT
26         select MMCONF_SUPPORT_DEFAULT
27         select CPU_INTEL_MODEL_206AX
28         select HAVE_DEBUG_RAM_SETUP
29         select INTEL_GMA_ACPI
31 config NORTHBRIDGE_INTEL_IVYBRIDGE_MRC
32         bool
33         select MMCONF_SUPPORT
34         select MMCONF_SUPPORT_DEFAULT
35         select CPU_INTEL_MODEL_306AX
36         select INTEL_GMA_ACPI
38 config NORTHBRIDGE_INTEL_IVYBRIDGE
39         bool
40         select MMCONF_SUPPORT
41         select MMCONF_SUPPORT_DEFAULT
42         select CPU_INTEL_MODEL_306AX
43         select HAVE_DEBUG_RAM_SETUP
44         select INTEL_GMA_ACPI
46 if NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC || NORTHBRIDGE_INTEL_IVYBRIDGE_MRC || NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_SANDYBRIDGE
48 config VGA_BIOS_ID
49         string
50         default "8086,0106"
52 config CACHE_MRC_SIZE_KB
53         int
54         default 512
56 config IVYBRIDGE_LVDS
57         bool
58         default n
60 config SANDYBRIDGE_LVDS
61         bool
62         default n
64 config MRC_CACHE_SIZE
65         hex
66         depends on !CHROMEOS
67         default 0x10000
69 config DCACHE_RAM_BASE
70         hex
71         default 0xff7e0000 if NORTHBRIDGE_INTEL_IVYBRIDGE_MRC
72         default 0xff7e0000 if NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC
73         default 0xfefe0000 if NORTHBRIDGE_INTEL_IVYBRIDGE
74         default 0xfefe0000 if NORTHBRIDGE_INTEL_SANDYBRIDGE
76 config DCACHE_RAM_SIZE
77         hex
78         default 0x20000
80 config BOOTBLOCK_NORTHBRIDGE_INIT
81         string
82         default "northbridge/intel/sandybridge/bootblock.c"
84 config DCACHE_RAM_MRC_VAR_SIZE
85         hex
86         default 0x4000
88 config HAVE_MRC
89         bool "Add a System Agent binary"
90         depends on !NORTHBRIDGE_INTEL_IVYBRIDGE && !NORTHBRIDGE_INTEL_SANDYBRIDGE
91         help
92           Select this option to add a System Agent binary to
93           the resulting coreboot image.
95           Note: Without this binary coreboot will not work
97 config MRC_FILE
98         string "Intel System Agent path and filename"
99         depends on HAVE_MRC
100         default "3rdparty/blobs/northbridge/intel/sandybridge/systemagent-r6.bin"
101         help
102           The path and filename of the file to use as System Agent
103           binary.
105 endif