src/northbridge/intel/haswell/minihd.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008 Advanced Micro Devices, Inc.
   5  * Copyright (C) 2008-2009 coresystems GmbH
   6  * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; version 2 of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <console/console.h>
  19 #include <device/device.h>
  20 #include <device/pci.h>
  21 #include <device/pci_ids.h>
  22 #include <device/pci_ops.h>
  23 #include <arch/io.h>
  24 #include <delay.h>
  25 #include <stdlib.h>
  26 #include <southbridge/intel/lynxpoint/hda_verb.h>
  27
  28 static const u32 minihd_verb_table[] = {
  29         /* coreboot specific header */
  30         0x80862807,     // Codec Vendor / Device ID: Intel Haswell Mini-HD
  31         0x00000000,     // Subsystem ID
  32         0x00000004,     // Number of jacks
  33
  34         /* Enable 3rd Pin and Converter Widget */
  35         0x00878101,
  36
  37         /* Pin Widget 5 - PORT B */
  38         0x00571C10,
  39         0x00571D00,
  40         0x00571E56,
  41         0x00571F18,
  42
  43         /* Pin Widget 6 - PORT C */
  44         0x00671C20,
  45         0x00671D00,
  46         0x00671E56,
  47         0x00671F18,
  48
  49         /* Pin Widget 7 - PORT D */
  50         0x00771C30,
  51         0x00771D00,
  52         0x00771E56,
  53         0x00771F18,
  54
  55         /* Disable 3rd Pin and Converter Widget */
  56         0x00878100,
  57
  58         /* Dummy entries to fill out the table */
  59         0x00878100,
  60         0x00878100,
  61 };
  62
  63 static void minihd_init(struct device *dev)
  64 {
  65         struct resource *res;
  66         u32 reg32;
  67         u8 *base;
  68         int codec_mask, i;
  69
  70         /* Find base address */
  71         res = find_resource(dev, PCI_BASE_ADDRESS_0);
  72         if (!res)
  73                 return;
  74
  75         base = res2mmio(res, 0, 0);
  76         printk(BIOS_DEBUG, "Mini-HD: base = %p\n", base);
  77
  78         /* Set Bus Master */
  79         reg32 = pci_read_config32(dev, PCI_COMMAND);
  80         pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
  81
  82         /* Mini-HD configuration */
  83         reg32 = read32(base + 0x100c);
  84         reg32 &= 0xfffc0000;
  85         reg32 |= 0x4;
  86         write32(base + 0x100c, reg32);
  87
  88         reg32 = read32(base + 0x1010);
  89         reg32 &= 0xfffc0000;
  90         reg32 |= 0x4b;
  91         write32(base + 0x1010, reg32);
  92
  93         /* Init the codec and write the verb table */
  94         codec_mask = hda_codec_detect(base);
  95
  96         if (codec_mask) {
  97                 for (i = 3; i >= 0; i--) {
  98                         if (codec_mask & (1 << i))
  99                                 hda_codec_init(base, i,
 100                                                sizeof(minihd_verb_table),
 101                                                minihd_verb_table);
 102                 }
 103         }
 104 }
 105
 106 static void minihd_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 107 {
 108         if (!vendor || !device) {
 109                 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
 110                                 pci_read_config32(dev, PCI_VENDOR_ID));
 111         } else {
 112                 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
 113                                 ((device & 0xffff) << 16) | (vendor & 0xffff));
 114         }
 115 }
 116
 117 static struct pci_operations minihd_pci_ops = {
 118         .set_subsystem    = minihd_set_subsystem,
 119 };
 120
 121 static struct device_operations minihd_ops = {
 122         .read_resources         = pci_dev_read_resources,
 123         .set_resources          = pci_dev_set_resources,
 124         .enable_resources       = pci_dev_enable_resources,
 125         .init                   = minihd_init,
 126         .scan_bus               = 0,
 127         .ops_pci                = &minihd_pci_ops,
 128 };
 129
 130 static const unsigned short pci_device_ids[] = { 0x0a0c, 0 };
 131
 132 static const struct pci_driver haswell_minihd __pci_driver = {
 133         .ops     = &minihd_ops,
 134         .vendor  = PCI_VENDOR_ID_INTEL,
 135         .devices = pci_device_ids,
 136 };