tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / northbridge / amd / amdfam10 / ht_config.h
blobbcfcf440edaeb1534d2f558b7d668cd07985d84d
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 typedef struct amdfam10_sysconf_t sys_info_conf_t;
18 /* FIXME */
19 u32 amdfam10_nodeid(device_t dev);
20 extern device_t __f1_dev[];
22 struct dram_base_mask_t {
23 u32 base; //[47:27] at [28:8]
24 u32 mask; //[47:27] at [28:8] and enable at bit 0
27 struct dram_base_mask_t get_dram_base_mask(u32 nodeid);
29 u32 get_ht_c_index(struct bus *link);
30 void store_ht_c_conf_bus(struct bus *link);
32 void set_config_map_reg(struct bus *link);
33 void clear_config_map_reg(struct bus *link);
36 void store_conf_io_addr(u32 nodeid, u32 linkn, u32 reg, u32 index,
37 u32 io_min, u32 io_max);
39 void store_conf_mmio_addr(u32 nodeid, u32 linkn, u32 reg, u32 index,
40 u32 mmio_min, u32 mmio_max);
43 u32 get_io_addr_index(u32 nodeid, u32 linkn);
44 u32 get_mmio_addr_index(u32 nodeid, u32 linkn);
46 void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg,
47 u32 io_min, u32 io_max);
49 void set_mmio_addr_reg(u32 nodeid, u32 linkn, u32 reg, u32 index, u32 mmio_min, u32 mmio_max, u32 nodes);