src/mainboard/via/vt8454c/mptable.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <device/device.h>
  18 #include <device/pci.h>
  19 #include <arch/smp/mpspec.h>
  20 #include <arch/ioapic.h>
  21 #include <cpu/x86/lapic.h>
  22 #include <console/console.h>
  23 #include <string.h>
  24 #include <stdint.h>
  25
  26 static void *smp_write_config_table(void *v)
  27 {
  28         struct mp_config_table *mc;
  29         int isa_bus;
  30
  31         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
  32
  33         mptable_init(mc, LOCAL_APIC_ADDR);
  34
  35         smp_write_processors(mc);
  36         mptable_write_buses(mc, NULL, &isa_bus);
  37
  38         /* I/O APICs:   APIC ID Version State Address */
  39         smp_write_ioapic(mc, 2, 17, VIO_APIC_VADDR);
  40
  41         mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
  42
  43         /* I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
  44         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x14);
  45         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x41, 0x2, 0x16);
  46         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x42, 0x2, 0x15);
  47         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x43, 0x2, 0x17);
  48         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x80, 0x4, 0x2, 0x11);
  49         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x11);
  50         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x2, 0x10, 0x2, 0x11);
  51
  52         /*Local Ints:   Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
  53         mptable_lintsrc(mc, 0x0);
  54
  55         /* Compute the checksums */
  56         return mptable_finalize(mc);
  57 }
  58
  59 unsigned long write_smp_table(unsigned long addr)
  60 {
  61         void *v;
  62         v = smp_write_floating_table(addr, 0);
  63         return (unsigned long)smp_write_config_table(v);
  64 }